From d339f16911c790196f5aaea3682819b9c03633bb Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 16 Dec 2015 15:40:06 +0100 Subject: arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code fine-tunes the behavior of the MMDC controller in order to improve the signal integrity and memory stability. Signed-off-by: Marek Vasut Cc: Stefano Babic --- arch/arm/include/asm/arch-mx6/mx6-ddr.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h index 68d9bda..12c30d2 100644 --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h @@ -456,6 +456,11 @@ void mx6sl_dram_iocfg(unsigned width, const struct mx6sl_iomux_ddr_regs *, const struct mx6sl_iomux_grp_regs *); +#if defined(CONFIG_MX6QDL) || defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) +int mmdc_do_write_level_calibration(void); +int mmdc_do_dqs_calibration(void); +#endif + /* configure mx6 mmdc registers */ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *, const struct mx6_mmdc_calibration *, -- cgit v1.1