From ad3d6e88a1a4e6aacc55b39c2bad1528100784c0 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 20 Aug 2015 11:52:14 +0200 Subject: armv8/mmu: Set bits marked RES1 in TCR For EL3 and EL2, the documentation says that bits 31 and 23 are reserved but should be written as 1. For EL1, only bit 23 is not reserved, so only write bit 31 as 1. Cc: Albert Aribaud Cc: Marc Zyngier Signed-off-by: Thierry Reding --- arch/arm/include/asm/armv8/mmu.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index a1c3c06..587ee39 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -110,6 +110,10 @@ TCR_IRGN_WBWA | \ TCR_T0SZ(VA_BITS)) +#define TCR_EL1_RSVD (1 << 31) +#define TCR_EL2_RSVD (1 << 31 | 1 << 23) +#define TCR_EL3_RSVD (1 << 31 | 1 << 23) + #ifndef __ASSEMBLY__ void set_pgtable_section(u64 *page_table, u64 index, -- cgit v1.1