From 96fdbec2f96c9e11758c8742409069eeef841722 Mon Sep 17 00:00:00 2001 From: R Sricharan Date: Mon, 4 Mar 2013 20:04:44 +0000 Subject: ARM: mmu: Introduce weak dram_bank_setup function Introduce a weak version of dram_bank_setup function to allow a platform specific function. This is used in the subsequent patch to setup dram region without 'XN' attribute in order to enable the region under client permissions. Signed-off-by: R Sricharan Cc: Vincent Stehle Cc: Tom Rini Cc: Albert ARIBAUD --- arch/arm/include/asm/cache.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 416d2c8..8153484 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -43,6 +43,7 @@ void l2_cache_enable(void); void l2_cache_disable(void); void set_section_dcache(int section, enum dcache_option option); +void dram_bank_mmu_setup(int bank); /* * The current upper bound for ARM L1 data cache line sizes is 64 bytes. We * use that value for aligning DMA buffers unless the board config has specified -- cgit v1.1