From 3f129280b3f1df51387447d8366ab6c3b6607547 Mon Sep 17 00:00:00 2001 From: Donghwa Lee Date: Mon, 7 Mar 2011 21:11:42 +0000 Subject: ARM: S5P: pwm driver support This is common pwm driver of S5P. Signed-off-by: Donghwa Lee Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang --- arch/arm/include/asm/arch-s5pc1xx/pwm.h | 19 +++++++++++++++++++ arch/arm/include/asm/arch-s5pc2xx/pwm.h | 19 +++++++++++++++++++ 2 files changed, 38 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-s5pc1xx/pwm.h b/arch/arm/include/asm/arch-s5pc1xx/pwm.h index 0369968..de4dbce 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/pwm.h +++ b/arch/arm/include/asm/arch-s5pc1xx/pwm.h @@ -22,6 +22,18 @@ #ifndef __ASM_ARM_ARCH_PWM_H_ #define __ASM_ARM_ARCH_PWM_H_ +#define PRESCALER_0 (8 - 1) /* prescaler of timer 0, 1 */ +#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */ + +/* Divider MUX */ +#define MUX_DIV_1 0 /* 1/1 period */ +#define MUX_DIV_2 1 /* 1/2 period */ +#define MUX_DIV_4 2 /* 1/4 period */ +#define MUX_DIV_8 3 /* 1/8 period */ +#define MUX_DIV_16 4 /* 1/16 period */ + +#define MUX_DIV_SHIFT(x) (x * 4) + /* Interval mode(Auto Reload) of PWM Timer 4 */ #define TCON4_AUTO_RELOAD (1 << 22) /* Update TCNTB4 */ @@ -29,6 +41,13 @@ /* start bit of PWM Timer 4 */ #define TCON4_START (1 << 20) +#define TCON_OFFSET(x) ((x + 1) * (!!x) << 2) + +#define TCON_START(x) (1 << TCON_OFFSET(x)) +#define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1)) +#define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2)) +#define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3)) + #ifndef __ASSEMBLY__ struct s5p_timer { unsigned int tcfg0; diff --git a/arch/arm/include/asm/arch-s5pc2xx/pwm.h b/arch/arm/include/asm/arch-s5pc2xx/pwm.h index 0369968..de4dbce 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/pwm.h +++ b/arch/arm/include/asm/arch-s5pc2xx/pwm.h @@ -22,6 +22,18 @@ #ifndef __ASM_ARM_ARCH_PWM_H_ #define __ASM_ARM_ARCH_PWM_H_ +#define PRESCALER_0 (8 - 1) /* prescaler of timer 0, 1 */ +#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */ + +/* Divider MUX */ +#define MUX_DIV_1 0 /* 1/1 period */ +#define MUX_DIV_2 1 /* 1/2 period */ +#define MUX_DIV_4 2 /* 1/4 period */ +#define MUX_DIV_8 3 /* 1/8 period */ +#define MUX_DIV_16 4 /* 1/16 period */ + +#define MUX_DIV_SHIFT(x) (x * 4) + /* Interval mode(Auto Reload) of PWM Timer 4 */ #define TCON4_AUTO_RELOAD (1 << 22) /* Update TCNTB4 */ @@ -29,6 +41,13 @@ /* start bit of PWM Timer 4 */ #define TCON4_START (1 << 20) +#define TCON_OFFSET(x) ((x + 1) * (!!x) << 2) + +#define TCON_START(x) (1 << TCON_OFFSET(x)) +#define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1)) +#define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2)) +#define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3)) + #ifndef __ASSEMBLY__ struct s5p_timer { unsigned int tcfg0; -- cgit v1.1