From 2ea3a448ccfdd3d6f7e01060ba8fa49bd97a73e0 Mon Sep 17 00:00:00 2001 From: Ashish kumar Date: Wed, 27 Jan 2016 18:09:32 +0530 Subject: armv8: ls2080a: Implement workaround for core errata 829520, 833471 829520: Code bounded by indirect conditional branch might corrupt instruction stream. Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect Predictor. 833471: VMSR FPSCR functional failure or deadlock. Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush. Signed-off-by: Ashish Kumar Reviewed-by: York Sun --- arch/arm/include/asm/arch-fsl-layerscape/config.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index f1b164f..3d8dac1 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -121,6 +121,10 @@ #define CONFIG_SYS_FSL_ERRATUM_A009663 #define CONFIG_SYS_FSL_ERRATUM_A009942 +/* ARM A57 CORE ERRATA */ +#define CONFIG_ARM_ERRATA_829520 +#define CONFIG_ARM_ERRATA_833471 + #elif defined(CONFIG_LS1043A) #define CONFIG_MAX_CPUS 4 #define CONFIG_SYS_CACHELINE_SIZE 64 -- cgit v1.1