From 0785dfd8a7b14cb2c99fc1271c865eb2170c620b Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 5 Nov 2015 08:34:35 +0100 Subject: ARM64: zynqmp: Use the same U-Boot version with/without ATF Remove SECURE_IOU option which is not needed. U-Boot itself can detect which EL level it is on and based on that use do platform setup. It also simplify usage because one Kconfig entry is gone. Signed-off-by: Michal Simek --- arch/arm/include/asm/arch-zynqmp/clk.h | 1 + arch/arm/include/asm/arch-zynqmp/hardware.h | 24 ++++++++++++++++++++---- 2 files changed, 21 insertions(+), 4 deletions(-) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-zynqmp/clk.h b/arch/arm/include/asm/arch-zynqmp/clk.h index d55bc31..b18333d 100644 --- a/arch/arm/include/asm/arch-zynqmp/clk.h +++ b/arch/arm/include/asm/arch-zynqmp/clk.h @@ -9,5 +9,6 @@ #define _ASM_ARCH_CLK_H_ unsigned long get_uart_clk(int dev_id); +unsigned long zynqmp_get_system_timer_freq(void); #endif /* _ASM_ARCH_CLK_H_ */ diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index bbf89d9..5f4cfe3 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -41,11 +41,8 @@ struct crlapb_regs { #define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR) -#if defined(CONFIG_SECURE_IOU) -#define ZYNQMP_IOU_SCNTR 0xFF260000 -#else +#define ZYNQMP_IOU_SCNTR_SECURE 0xFF260000 #define ZYNQMP_IOU_SCNTR 0xFF250000 -#endif #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1 #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2 @@ -57,6 +54,14 @@ struct iou_scntr { #define iou_scntr ((struct iou_scntr *)ZYNQMP_IOU_SCNTR) +struct iou_scntr_secure { + u32 counter_control_register; + u32 reserved0[7]; + u32 base_frequency_id_register; +}; + +#define iou_scntr_secure ((struct iou_scntr_secure *)ZYNQMP_IOU_SCNTR_SECURE) + /* Bootmode setting values */ #define BOOT_MODES_MASK 0x0000000F #define SD_MODE 0x00000003 @@ -106,9 +111,20 @@ struct apu_regs { #define apu_base ((struct apu_regs *)ZYNQMP_APU_BASEADDR) /* Board version value */ +#define ZYNQMP_CSU_BASEADDR 0xFFCA0000 #define ZYNQMP_CSU_VERSION_SILICON 0x0 #define ZYNQMP_CSU_VERSION_EP108 0x1 #define ZYNQMP_CSU_VERSION_VELOCE 0x2 #define ZYNQMP_CSU_VERSION_QEMU 0x3 +#define ZYNQMP_SILICON_VER_MASK 0xF000 +#define ZYNQMP_SILICON_VER_SHIFT 12 + +struct csu_regs { + u32 reserved0[17]; + u32 version; +}; + +#define csu_base ((struct csu_regs *)ZYNQMP_CSU_BASEADDR) + #endif /* _ASM_ARCH_HARDWARE_H */ -- cgit v1.1 From 0a5bcc8c0d04d4dd277cfeb1edf1e7b298b0f484 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Fri, 13 Mar 2015 11:10:26 +0530 Subject: ARM64: zynqmp: Modify the SD and QSPI bootmode values Modify the SD bootmode value to 0x3 as per latest spec. Also add new boot mode QSPI 32 bit boot mode Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/include/asm/arch-zynqmp/hardware.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 5f4cfe3..5eec999 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -64,7 +64,10 @@ struct iou_scntr_secure { /* Bootmode setting values */ #define BOOT_MODES_MASK 0x0000000F +#define QSPI_MODE_24BIT 0x00000001 +#define QSPI_MODE_32BIT 0x00000002 #define SD_MODE 0x00000003 +#define NAND_MODE 0x00000004 #define EMMC_MODE 0x00000006 #define JTAG_MODE 0x00000000 -- cgit v1.1 From af813acd481bf3490a982e279567e49b59f28117 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 5 Oct 2015 10:51:12 +0200 Subject: ARM64: zynqmp: Add support for SD1 boot mode SD1 boot mode is using different bootmode values. Add support for this mode used on DC1. Signed-off-by: Michal Simek --- arch/arm/include/asm/arch-zynqmp/hardware.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 5eec999..5879382 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -66,7 +66,8 @@ struct iou_scntr_secure { #define BOOT_MODES_MASK 0x0000000F #define QSPI_MODE_24BIT 0x00000001 #define QSPI_MODE_32BIT 0x00000002 -#define SD_MODE 0x00000003 +#define SD_MODE 0x00000003 /* sd 0 */ +#define SD_MODE1 0x00000005 /* sd 1 */ #define NAND_MODE 0x00000004 #define EMMC_MODE 0x00000006 #define JTAG_MODE 0x00000000 -- cgit v1.1