From 10bc1a7f49b2efec3eddca18949d28ad053f40bb Mon Sep 17 00:00:00 2001 From: Rajeshwari Shinde Date: Tue, 3 Jul 2012 20:02:58 +0000 Subject: EXYNOS5: CLOCK: Add BPLL support This patch adds support for BPLL clock. Signed-off-by: Rajeshwari Shinde Acked-by: Joonyoung Shim Signed-off-by: Minkyu Kang --- arch/arm/include/asm/arch-exynos/clk.h | 1 + arch/arm/include/asm/arch-exynos/clock.h | 2 ++ 2 files changed, 3 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-exynos/clk.h b/arch/arm/include/asm/arch-exynos/clk.h index 72dc655..5529025 100644 --- a/arch/arm/include/asm/arch-exynos/clk.h +++ b/arch/arm/include/asm/arch-exynos/clk.h @@ -27,6 +27,7 @@ #define EPLL 2 #define HPLL 3 #define VPLL 4 +#define BPLL 5 unsigned long get_pll_clk(int pllreg); unsigned long get_arm_clk(void); diff --git a/arch/arm/include/asm/arch-exynos/clock.h b/arch/arm/include/asm/arch-exynos/clock.h index bf41c19..fce38ef 100644 --- a/arch/arm/include/asm/arch-exynos/clock.h +++ b/arch/arm/include/asm/arch-exynos/clock.h @@ -599,4 +599,6 @@ struct exynos5_clock { #define MPLL_FOUT_SEL_SHIFT 4 #define MPLL_FOUT_SEL_MASK 0x1 +#define BPLL_FOUT_SEL_SHIFT 0 +#define BPLL_FOUT_SEL_MASK 0x1 #endif -- cgit v1.1