From e08d6f3aaf11e4138de1ed04acccbcf38d04f1b6 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Wed, 26 Jun 2013 10:11:06 +0800 Subject: arm: atmel: add gmac support for sama5d3xek board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit add gmac support for sama5d3xek board, the gmac embedded in: - sama5d33, sama5d34, sama5d35 Signed-off-by: Bo Shen Signed-off-by: Andreas Bießmann --- arch/arm/include/asm/arch-at91/at91_common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/include/asm') diff --git a/arch/arm/include/asm/arch-at91/at91_common.h b/arch/arm/include/asm/arch-at91/at91_common.h index d659702..9f54fdd 100644 --- a/arch/arm/include/asm/arch-at91/at91_common.h +++ b/arch/arm/include/asm/arch-at91/at91_common.h @@ -10,6 +10,7 @@ #define AT91_COMMON_H void at91_can_hw_init(void); +void at91_gmac_hw_init(void); void at91_macb_hw_init(void); void at91_mci_hw_init(void); void at91_serial0_hw_init(void); -- cgit v1.1 From b2d96dc28ffb2acad250ffb551a442396db83f38 Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Wed, 3 Jul 2013 11:11:45 +0800 Subject: ARM: at91: atmel_nand: pmecc driver will select the galois table by sector size MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Define the galois index table offset in chip head file. So user do not need to set by himself. Driver will set it correctly according to sector_size. Signed-off-by: Josh Wu Acked-by: Scott Wood [rebased on master] Signed-off-by: Andreas Bießmann --- arch/arm/include/asm/arch-at91/at91sam9x5.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/include/asm') diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5.h b/arch/arm/include/asm/arch-at91/at91sam9x5.h index fcc6fdc..a471038 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9x5.h +++ b/arch/arm/include/asm/arch-at91/at91sam9x5.h @@ -162,6 +162,12 @@ #define ATMEL_ID_UHP ATMEL_ID_UHPHS /* + * PMECC table in ROM + */ +#define ATMEL_PMECC_INDEX_OFFSET_512 0x8000 +#define ATMEL_PMECC_INDEX_OFFSET_1024 0x10000 + +/* * at91sam9x5 specific prototypes */ #ifndef __ASSEMBLY__ -- cgit v1.1 From be3dbef50262e60bcdaf0a6992cec5ed891fecbb Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Wed, 3 Jul 2013 11:11:46 +0800 Subject: ARM: at91: sama5d3: remove unused definition about PMECC alpha table offset MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Josh Wu Acked-by: Scott Wood Signed-off-by: Andreas Bießmann --- arch/arm/include/asm/arch-at91/sama5d3.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/include/asm') diff --git a/arch/arm/include/asm/arch-at91/sama5d3.h b/arch/arm/include/asm/arch-at91/sama5d3.h index 49bd335..fefee5e 100644 --- a/arch/arm/include/asm/arch-at91/sama5d3.h +++ b/arch/arm/include/asm/arch-at91/sama5d3.h @@ -191,8 +191,6 @@ */ #define ATMEL_PMECC_INDEX_OFFSET_512 0x10000 #define ATMEL_PMECC_INDEX_OFFSET_1024 0x18000 -#define ATMEL_PMECC_ALPHA_OFFSET_512 0x10000 -#define ATMEL_PMECC_ALPHA_OFFSET_1024 0x18000 /* * SAMA5D3 specific prototypes -- cgit v1.1 From 1f7b06ee5f791c3f3c02c5389bbb4a602cef5ad1 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Fri, 9 Aug 2013 15:43:09 +0800 Subject: arm: sama5d3: fix smc cs related registers offset MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit the smc cs related registers start at 0x600 and loop with 5 registers so the reserved register should be in at91_smc structure while no in at91_cs structure. So fix it Signed-off-by: Bo Shen Signed-off-by: Andreas Bießmann --- arch/arm/include/asm/arch-at91/sama5d3_smc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/include/asm') diff --git a/arch/arm/include/asm/arch-at91/sama5d3_smc.h b/arch/arm/include/asm/arch-at91/sama5d3_smc.h index c060894..6caa9b6 100644 --- a/arch/arm/include/asm/arch-at91/sama5d3_smc.h +++ b/arch/arm/include/asm/arch-at91/sama5d3_smc.h @@ -17,7 +17,6 @@ #define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x60C) #else struct at91_cs { - u32 reserved[96]; u32 setup; /* 0x600 SMC Setup Register */ u32 pulse; /* 0x604 SMC Pulse Register */ u32 cycle; /* 0x608 SMC Cycle Register */ @@ -26,6 +25,7 @@ struct at91_cs { }; struct at91_smc { + u32 reserved[384]; struct at91_cs cs[4]; }; #endif /* __ASSEMBLY__ */ -- cgit v1.1