From ed80584f3087f8d4da996cddd9807fc90f3de06c Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Wed, 6 Jan 2016 15:13:07 +0800 Subject: sunxi: Support H3 CCU security switches H3's CCU includes some switches which disable non-secure access to some of the more critical clock controls, such as MBUS, PLLs, and main platform busses. Configure them to enable non-secure access. For now the only SoC that has this feature is the H3. For other platforms just use a default (weak) empty function so things do not break. Signed-off-by: Chen-Yu Tsai Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/include/asm/arch-sunxi/clock.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/include/asm/arch-sunxi/clock.h') diff --git a/arch/arm/include/asm/arch-sunxi/clock.h b/arch/arm/include/asm/arch-sunxi/clock.h index 8ca58ae..6c0573f 100644 --- a/arch/arm/include/asm/arch-sunxi/clock.h +++ b/arch/arm/include/asm/arch-sunxi/clock.h @@ -30,6 +30,7 @@ int clock_init(void); int clock_twi_onoff(int port, int state); void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz); void clock_init_safe(void); +void clock_init_sec(void); void clock_init_uart(void); #endif -- cgit v1.1