From b20b70fcc027a173b61950e9bb4a736557d19697 Mon Sep 17 00:00:00 2001 From: Michael Kurz Date: Sun, 22 Jan 2017 16:04:27 +0100 Subject: net: stm32: add designware mac glue code for stm32 This patch adds glue code required for enabling the designware mac on stm32f7 devices. Signed-off-by: Michael Kurz Acked-by: Joe Hershberger --- arch/arm/include/asm/arch-stm32f7/syscfg.h | 38 ++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 arch/arm/include/asm/arch-stm32f7/syscfg.h (limited to 'arch/arm/include/asm/arch-stm32f7/syscfg.h') diff --git a/arch/arm/include/asm/arch-stm32f7/syscfg.h b/arch/arm/include/asm/arch-stm32f7/syscfg.h new file mode 100644 index 0000000..49e78f2 --- /dev/null +++ b/arch/arm/include/asm/arch-stm32f7/syscfg.h @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2016 + * Michael Kurz, michi.kurz@gmail.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _STM32_SYSCFG_H +#define _STM32_SYSCFG_H + +struct stm32_syscfg_regs { + u32 memrmp; + u32 pmc; + u32 exticr1; + u32 exticr2; + u32 exticr3; + u32 exticr4; + u32 cmpcr; +}; + +/* + * SYSCFG registers base + */ +#define STM32_SYSCFG ((struct stm32_syscfg_regs *)STM32_SYSCFG_BASE) + +/* SYSCFG memory remap register */ +#define SYSCFG_MEMRMP_MEM_BOOT BIT(0) +#define SYSCFG_MEMRMP_SWP_FMC BIT(10) + +/* SYSCFG peripheral mode configuration register */ +#define SYSCFG_PMC_ADCXDC2 BIT(16) +#define SYSCFG_PMC_MII_RMII_SEL BIT(23) + +/* Compensation cell control register */ +#define SYSCFG_CMPCR_CMP_PD BIT(0) +#define SYSCFG_CMPCR_READY BIT(8) + +#endif -- cgit v1.1