From 008a351a8a6b6dda8cd6d6d5813a44bdd4a455df Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Mon, 24 Jan 2011 15:22:23 +0900 Subject: armv7: add support for S5PC210 SoC S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor. Signed-off-by: Minkyu Kang Signed-off-by: Kyungmin Park --- arch/arm/include/asm/arch-s5pc2xx/clk.h | 36 +++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 arch/arm/include/asm/arch-s5pc2xx/clk.h (limited to 'arch/arm/include/asm/arch-s5pc2xx/clk.h') diff --git a/arch/arm/include/asm/arch-s5pc2xx/clk.h b/arch/arm/include/asm/arch-s5pc2xx/clk.h new file mode 100644 index 0000000..5a1cdf1 --- /dev/null +++ b/arch/arm/include/asm/arch-s5pc2xx/clk.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2010 Samsung Electronics + * Minkyu Kang + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARM_ARCH_CLK_H_ +#define __ASM_ARM_ARCH_CLK_H_ + +#define APLL 0 +#define MPLL 1 +#define EPLL 2 +#define HPLL 3 +#define VPLL 4 + +unsigned long get_pll_clk(int pllreg); +unsigned long get_arm_clk(void); +unsigned long get_pwm_clk(void); +unsigned long get_uart_clk(int dev_index); + +#endif -- cgit v1.1