From 7e2173cf82d0bc235b695460c56d46927febdf36 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Fri, 26 Apr 2013 01:34:47 +0000 Subject: imx: iomux-v3: Include PKE and PUE to pad control pull definitions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PUE requires PKE to mean something, as do pull values with PUE, so do not compell users to explicitly use PKE and PUE everywhere. This is also what is done on Linux and what has already been done for i.MX51. By the way, remove some unused pad control definitions. There is no change of behavior. Note that SPI_PAD_CTRL was defined by several boards with a pull value, but without PKE or PUE, which means that no pull was actually enabled in the pad. This might be a bug in those boards, but this patch does not change the behavior, so it just removes the meaningless pull value from those definitions. Signed-off-by: Benoît Thébaudeau --- arch/arm/include/asm/arch-mx5/iomux-mx51.h | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'arch/arm/include/asm/arch-mx5/iomux-mx51.h') diff --git a/arch/arm/include/asm/arch-mx5/iomux-mx51.h b/arch/arm/include/asm/arch-mx5/iomux-mx51.h index 5f96dc4..328c188 100644 --- a/arch/arm/include/asm/arch-mx5/iomux-mx51.h +++ b/arch/arm/include/asm/arch-mx5/iomux-mx51.h @@ -22,7 +22,7 @@ #include /* Pad control groupings */ -#define MX51_UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_DSE_HIGH | \ +#define MX51_UART_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_DSE_HIGH | \ PAD_CTL_HYS | PAD_CTL_SRE_FAST) #define MX51_I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \ PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | \ @@ -30,13 +30,11 @@ #define MX51_ESDHC_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \ PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | \ PAD_CTL_HYS) -#define MX51_USBH1_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_SRE_FAST | \ - PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | \ - PAD_CTL_HYS | PAD_CTL_PUE) +#define MX51_USBH1_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_HYS) #define MX51_ECSPI_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_HYS | \ PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST) -#define MX51_SDHCI_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_PUE | \ +#define MX51_SDHCI_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PUS_47K_UP | \ PAD_CTL_SRE_FAST | PAD_CTL_DVS) #define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | PAD_CTL_SRE_FAST) -- cgit v1.1