From 20187fd11c37226fac8661bbac96ddd4fdf507b1 Mon Sep 17 00:00:00 2001
From: Hao Zhang <hzhang@ti.com>
Date: Wed, 16 Jul 2014 00:59:24 +0300
Subject: ARM: keystone2: add MSMC cache coherency support for K2E SOC

This patch adds Keystone2 K2E SOC specific code to support
MSMC cache coherency. Also create header file for msmc to hold
its API.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
---
 arch/arm/include/asm/arch-keystone/msmc.h | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-keystone/msmc.h

(limited to 'arch/arm/include/asm/arch-keystone/msmc.h')

diff --git a/arch/arm/include/asm/arch-keystone/msmc.h b/arch/arm/include/asm/arch-keystone/msmc.h
new file mode 100644
index 0000000..c320db5
--- /dev/null
+++ b/arch/arm/include/asm/arch-keystone/msmc.h
@@ -0,0 +1,17 @@
+/*
+ * MSMC controller
+ *
+ * (C) Copyright 2014
+ *     Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _MSMC_H_
+#define _MSMC_H_
+
+#include <asm/arch/hardware.h>
+
+void msmc_share_all_segments(int priv_id);
+
+#endif
-- 
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