From 59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Thu, 14 Mar 2013 21:11:16 +0000 Subject: am335x: Enable DDR PHY dynamic power down bit for DDR3 boards Enable DDR PHY dynamic power down bit, which enables powering down the IO receiver when not performing read. This also helps in reducing overall power consumption in low power states (suspend/standby). Signed-off-by: Vaibhav Hiremath Signed-off-by: Satyanarayana, Sandhya Cc: Tom Rini Reviewed-by: Tom Rini --- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/include/asm/arch-am33xx/ddr_defs.h') diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index ae43ef8..7ab3baf 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -28,6 +28,7 @@ #define VTP_CTRL_START_EN (0x1) #define PHY_DLL_LOCK_DIFF 0x0 #define DDR_CKE_CTRL_NORMAL 0x1 +#define PHY_EN_DYN_PWRDN (0x1 << 20) /* Micron MT47H128M16RT-25E */ #define MT47H128M16RT25E_EMIF_READ_LATENCY 0x100005 -- cgit v1.1