From 0f6db86127af97797ea39be23f0c410d0b566957 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 11 Oct 2016 13:00:37 +0800 Subject: MLK-13307-5 imx: mx6sll: add iomux settings Add iomux settings for i.MX6 SLL Signed-off-by: Peng Fan Signed-off-by: Ye.Li (cherry picked from commit e54356eb1374fe6b59f4dd4b4b60790dbe8bbad9) --- arch/arm/imx-common/iomux-v3.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'arch/arm/imx-common/iomux-v3.c') diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c index 338f564..0123fa2 100644 --- a/arch/arm/imx-common/iomux-v3.c +++ b/arch/arm/imx-common/iomux-v3.c @@ -31,7 +31,7 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) (pad & MUX_PAD_CTRL_OFS_MASK) >> MUX_PAD_CTRL_OFS_SHIFT; u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; -#if defined CONFIG_MX6SL +#if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) /* Check whether LVE bit needs to be set */ if (pad_ctrl & PAD_CTL_LVE) { pad_ctrl &= ~PAD_CTL_LVE; @@ -51,7 +51,7 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) sel_input_ofs += IOMUX_LPSR_SEL_INPUT_OFS; } #else - if (is_cpu_type(MXC_CPU_MX6ULL)) { + if (is_cpu_type(MXC_CPU_MX6ULL) || is_cpu_type(MXC_CPU_MX6SLL)) { if (lpsr == IOMUX_CONFIG_LPSR) { base = (void *)IOMUXC_SNVS_BASE_ADDR; mux_mode &= ~IOMUX_CONFIG_LPSR; @@ -60,7 +60,8 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) #endif #endif - if (is_soc_type(MXC_SOC_MX7) || is_cpu_type(MXC_CPU_MX6ULL) || mux_ctrl_ofs) + if (is_soc_type(MXC_SOC_MX7) || is_cpu_type(MXC_CPU_MX6ULL) || + is_cpu_type(MXC_CPU_MX6SLL) || mux_ctrl_ofs) __raw_writel(mux_mode, base + mux_ctrl_ofs); if (sel_input_ofs) @@ -73,6 +74,10 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) #else if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs) __raw_writel(pad_ctrl, base + pad_ctrl_ofs); +#if defined(CONFIG_MX6SLL) + else if ((pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs) + clrbits_le32(base + pad_ctrl_ofs, PAD_CTL_IPD_BIT); +#endif #endif #ifdef CONFIG_IOMUX_LPSR -- cgit v1.1