From c4adc50ea66436438f10d7eedb00d2c441ec9dbe Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 29 Jun 2016 19:38:56 +0900 Subject: ARM: dts: uniphier: sync Device Trees with upstream Linux I periodically sync Device Trees for better maintainability. Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-common32.dtsi | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) (limited to 'arch/arm/dts/uniphier-common32.dtsi') diff --git a/arch/arm/dts/uniphier-common32.dtsi b/arch/arm/dts/uniphier-common32.dtsi index 7d59112..b0b2b57 100644 --- a/arch/arm/dts/uniphier-common32.dtsi +++ b/arch/arm/dts/uniphier-common32.dtsi @@ -22,6 +22,7 @@ #size-cells = <1>; ranges; interrupt-parent = <&intc>; + u-boot,dm-pre-reloc; serial0: serial@54006800 { compatible = "socionext,uniphier-uart"; @@ -65,9 +66,12 @@ system_bus: system-bus@58c00000 { compatible = "socionext,uniphier-system-bus"; + status = "disabled"; reg = <0x58c00000 0x400>; #address-cells = <2>; #size-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_system_bus>; }; smpctrl@59800000 { @@ -109,9 +113,15 @@ interrupt-controller; }; - pinctrl: pinctrl@5f801000 { - /* specify compatible in each SoC DTSI */ - reg = <0x5f801000 0xe00>; + soc-glue@5f800000 { + compatible = "simple-mfd", "syscon"; + reg = <0x5f800000 0x2000>; + u-boot,dm-pre-reloc; + + pinctrl: pinctrl { + /* specify compatible in each SoC DTSI */ + u-boot,dm-pre-reloc; + }; }; sysctrl: sysctrl@61840000 { @@ -124,8 +134,12 @@ nand: nand@68000000 { compatible = "denali,denali-nand-dt"; - reg = <0x68000000 0x20>, <0x68100000 0x1000>; + status = "disabled"; reg-names = "nand_data", "denali_reg"; + reg = <0x68000000 0x20>, <0x68100000 0x1000>; + interrupts = <0 65 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; }; }; }; -- cgit v1.1