From dae594f2105b08ce76aa6b3b02433abb0796be51 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 21 Jan 2016 19:45:17 -0700 Subject: rockchip: spl: Support full-speed CPU in SPL Add a feature which speeds up the CPU to full speed in SPL to minimise boot time. This is only supported for certain boards (at present only jerry). Signed-off-by: Simon Glass --- arch/arm/dts/rk3288-veyron.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/dts/rk3288-veyron.dtsi') diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi index c201e85..421d212 100644 --- a/arch/arm/dts/rk3288-veyron.dtsi +++ b/arch/arm/dts/rk3288-veyron.dtsi @@ -332,6 +332,7 @@ clock-frequency = <400000>; i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */ i2c-scl-rising-time-ns = <100>; /* 45ns measured */ + u-boot,dm-pre-reloc; rk808: pmic@1b { compatible = "rockchip,rk808"; @@ -344,6 +345,7 @@ rockchip,system-power-controller; wakeup-source; #clock-cells = <1>; + u-boot,dm-pre-reloc; vcc1-supply = <&vcc33_sys>; vcc2-supply = <&vcc33_sys>; -- cgit v1.1