From d5fe220df4afb7dda1aeeced3635f7f745723685 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Thu, 27 Sep 2012 10:23:58 +0000 Subject: mx5 clocks: Fix MXC_FEC_CLK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The FEC clock does not come from PLL1, but from the IPG clock. The previous code was even inconsistent with itself, returning the IPG clock as expected for imx_get_fecclk(), but the PLL1 clock for mxc_get_clock(MXC_FEC_CLK). Signed-off-by: Benoît Thébaudeau Cc: Stefano Babic --- arch/arm/cpu/armv7/mx5/clock.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c index dbfe87c..a59b88a 100644 --- a/arch/arm/cpu/armv7/mx5/clock.c +++ b/arch/arm/cpu/armv7/mx5/clock.c @@ -474,7 +474,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk) case MXC_CSPI_CLK: return imx_get_cspiclk(); case MXC_FEC_CLK: - return decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); + return get_ipg_clk(); case MXC_SATA_CLK: return get_ahb_clk(); case MXC_DDR_CLK: @@ -490,10 +490,9 @@ u32 imx_get_uartclk(void) return get_uart_clk(); } - u32 imx_get_fecclk(void) { - return mxc_get_clock(MXC_IPG_CLK); + return get_ipg_clk(); } static int gcd(int m, int n) -- cgit v1.1