From 2b16e51c2ff1073592a3a3f52a6725bdd7b11f81 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 4 Jan 2013 16:07:26 +0000 Subject: mx6: Add workaround for ARM errata Add workaround for the following ARM errata: 743622 and 751472. The motivation for this change is the following kernel commit 62e4d357a (ARM: 7609/1: disable errata work-arounds which access secure registers), which removes the errata from multiplatform kernel. Since imx has been converted to multiplatform in the kernel, we need to apply such workarounds into the bootloader. Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel. Explanation of each erratum is provided at "Chip Errata for the i.MX 6Dual/6Quad" document available at: cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf Signed-off-by: Fabio Estevam --- arch/arm/cpu/armv7/mx6/lowlevel_init.S | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S index acadef2..7b60ca7 100644 --- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S @@ -20,6 +20,16 @@ #include +.macro init_arm_errata + /* ARM erratum ID #743622 */ + mrc p15, 0, r10, c15, c0, 1 /* read diagnostic register */ + orr r10, r10, #1 << 6 /* set bit #6 */ + /* ARM erratum ID #751472 */ + orr r10, r10, #1 << 11 /* set bit #11 */ + mcr p15, 0, r10, c15, c0, 1 /* write diagnostic register */ +.endm + ENTRY(lowlevel_init) + init_arm_errata mov pc, lr ENDPROC(lowlevel_init) -- cgit v1.1 From abbab70363dcdb270cbf24d47849214dd3a3e010 Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Mon, 22 Oct 2012 15:19:01 +0000 Subject: mx31/mx35/mx51/mx53/mx6: add watchdog Use a common watchdog driver for all these cpus. Signed-off-by: Troy Kisky Acked-by: Stefano Babic --- arch/arm/cpu/arm1136/mx31/timer.c | 39 ------------------------------------- arch/arm/cpu/arm1136/mx35/generic.c | 6 ------ 2 files changed, 45 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c index 36266da..86916d1 100644 --- a/arch/arm/cpu/arm1136/mx31/timer.c +++ b/arch/arm/cpu/arm1136/mx31/timer.c @@ -161,42 +161,3 @@ ulong get_tbclk(void) { return MXC_CLK32; } - -void reset_cpu(ulong addr) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE; - wdog->wcr = WDOG_ENABLE; - while (1) - ; -} - -#ifdef CONFIG_HW_WATCHDOG -void mxc_hw_watchdog_enable(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE; - u16 secs; - - /* - * The timer watchdog can be set between - * 0.5 and 128 Seconds. If not defined - * in configuration file, sets 64 Seconds - */ -#ifdef CONFIG_SYS_WD_TIMER_SECS - secs = (CONFIG_SYS_WD_TIMER_SECS << 1) & 0xFF; - if (!secs) secs = 1; -#else - secs = 64; -#endif - setbits_le16(&wdog->wcr, (secs << WDOG_WT_SHIFT) | WDOG_ENABLE - | WDOG_WDZST); -} - - -void mxc_hw_watchdog_reset(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE; - - writew(0x5555, &wdog->wsr); - writew(0xAAAA, &wdog->wsr); -} -#endif diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c index 98aa4d1..295a98e 100644 --- a/arch/arm/cpu/arm1136/mx35/generic.c +++ b/arch/arm/cpu/arm1136/mx35/generic.c @@ -488,12 +488,6 @@ int get_clocks(void) return 0; } -void reset_cpu(ulong addr) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR; - writew(4, &wdog->wcr); -} - #define RCSR_MEM_CTL_WEIM 0 #define RCSR_MEM_CTL_NAND 1 #define RCSR_MEM_CTL_ATA 2 -- cgit v1.1