From 7fd5b9bfe4a66a0eec232ab36ddafdd823e263c2 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Tue, 22 May 2012 00:03:27 +0000 Subject: OMAP5: Change voltages for omap5432 Change voltages for OMAP5432 Signed-off-by: Lokesh Vutla --- arch/arm/cpu/armv7/omap5/clocks.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/omap5/clocks.c b/arch/arm/cpu/armv7/omap5/clocks.c index 1a59f26..65dc5c7 100644 --- a/arch/arm/cpu/armv7/omap5/clocks.c +++ b/arch/arm/cpu/armv7/omap5/clocks.c @@ -260,20 +260,31 @@ const struct dpll_params *get_abe_dpll_params(void) */ void scale_vcores(void) { - u32 volt; + u32 volt_core, volt_mpu, volt_mm; omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ); /* Palmas settings */ - volt = VDD_CORE; - do_scale_vcore(SMPS_REG_ADDR_8_CORE, volt); - - volt = VDD_MPU; - do_scale_vcore(SMPS_REG_ADDR_12_MPU, volt); - - volt = VDD_MM; - do_scale_vcore(SMPS_REG_ADDR_45_IVA, volt); - + if (omap_revision() != OMAP5432_ES1_0) { + volt_core = VDD_CORE; + volt_mpu = VDD_MPU; + volt_mm = VDD_MM; + } else { + volt_core = VDD_CORE_5432; + volt_mpu = VDD_MPU_5432; + volt_mm = VDD_MM_5432; + } + + do_scale_vcore(SMPS_REG_ADDR_8_CORE, volt_core); + do_scale_vcore(SMPS_REG_ADDR_12_MPU, volt_mpu); + do_scale_vcore(SMPS_REG_ADDR_45_IVA, volt_mm); + + if (omap_revision() == OMAP5432_ES1_0) { + /* Configure LDO SRAM "magic" bits */ + writel(2, &prcm->prm_sldo_core_setup); + writel(2, &prcm->prm_sldo_mpu_setup); + writel(2, &prcm->prm_sldo_mm_setup); + } } u32 get_offset_code(u32 volt_offset) -- cgit v1.1