From 5af741f1e98457de626f01302138de20c948fd46 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 30 Nov 2014 11:58:17 +0100 Subject: sun6i: Add a sigma_delta_enable paramter to clock_set_pll5() The sun8i dram code sometimes wants to enable sigma delta mode, add a parameter to allow this. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 9 +++++++-- arch/arm/cpu/armv7/sunxi/dram_sun6i.c | 2 +- 2 files changed, 8 insertions(+), 3 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c index 8e949c6..193e314 100644 --- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c +++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c @@ -144,15 +144,20 @@ void clock_set_pll3(unsigned int clk) &ccm->pll3_cfg); } -void clock_set_pll5(unsigned int clk) +void clock_set_pll5(unsigned int clk, bool sigma_delta_enable) { struct sunxi_ccm_reg * const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; const int k = 2; const int m = 1; + if (sigma_delta_enable) + writel(CCM_PLL5_PATTERN, &ccm->pll5_pattern_cfg); + /* PLL5 rate = 24000000 * n * k / m */ - writel(CCM_PLL5_CTRL_EN | CCM_PLL5_CTRL_UPD | + writel(CCM_PLL5_CTRL_EN | + (sigma_delta_enable ? CCM_PLL5_CTRL_SIGMA_DELTA_EN : 0) | + CCM_PLL5_CTRL_UPD | CCM_PLL5_CTRL_N(clk / (24000000 * k / m)) | CCM_PLL5_CTRL_K(k) | CCM_PLL5_CTRL_M(m), &ccm->pll5_cfg); diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c index 61bb8d4..bc6428a 100644 --- a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c +++ b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c @@ -46,7 +46,7 @@ static void mctl_sys_init(void) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; const int dram_clk_div = 2; - clock_set_pll5(DRAM_CLK * dram_clk_div); + clock_set_pll5(DRAM_CLK * dram_clk_div, false); clrsetbits_le32(&ccm->dram_clk_cfg, CCM_DRAMCLK_CFG_DIV0_MASK, CCM_DRAMCLK_CFG_DIV0(dram_clk_div) | CCM_DRAMCLK_CFG_RST | -- cgit v1.1