From 1ace4022394eacbdae12e7275c445699f8ad4833 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Wed, 26 Feb 2014 17:47:58 +0400 Subject: sizes.h - consolidate for all architectures Copied from Linux sources "include/linux/sizes.h" commit 413541dd66d51f791a0b169d9b9014e4f56be13c Signed-off-by: Alexey Brodkin Cc: Vineet Gupta Cc: Tom Rini Cc: Stefan Roese Cc: Albert Aribaud Acked-by: Tom Rini Acked-by: Stefan Roese [trini: Add bcm Kona platforms to the patch] Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/kona-common/hwinit-common.c | 2 +- arch/arm/cpu/armv7/omap-common/hwinit-common.c | 2 +- arch/arm/cpu/armv7/omap4/hwinit.c | 2 +- arch/arm/cpu/armv7/omap5/hwinit.c | 2 +- arch/arm/cpu/at91-common/phy.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c b/arch/arm/cpu/armv7/kona-common/hwinit-common.c index f8b1e06..2b3a840 100644 --- a/arch/arm/cpu/armv7/kona-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/kona-common/hwinit-common.c @@ -5,7 +5,7 @@ */ #include -#include +#include #ifndef CONFIG_SYS_DCACHE_OFF void enable_caches(void) diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c index ade744e..8ebc0ce 100644 --- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c b/arch/arm/cpu/armv7/omap4/hwinit.c index b0598a0..db16548 100644 --- a/arch/arm/cpu/armv7/omap4/hwinit.c +++ b/arch/arm/cpu/armv7/omap4/hwinit.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c index 737d23c..93feb16 100644 --- a/arch/arm/cpu/armv7/omap5/hwinit.c +++ b/arch/arm/cpu/armv7/omap5/hwinit.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/cpu/at91-common/phy.c b/arch/arm/cpu/at91-common/phy.c index 3b6c60c..2cba716 100644 --- a/arch/arm/cpu/at91-common/phy.c +++ b/arch/arm/cpu/at91-common/phy.c @@ -14,7 +14,7 @@ #include #include -#include +#include #include #include #include -- cgit v1.1 From f3026c16836b0bdc2b4a170f29005d834a748c5e Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 3 Feb 2014 14:03:25 -0700 Subject: ARM: tegra: fix pmc_pwrgate_timer_mult register definition Register pmc_pwrgate_timer_mult has a different layout on Tegra114 and Tegra124. Reflect this in pmc.h. Also, simply write the whole of the register in start_cpu() rather than doing a read-modify-write; the register is simple enough that the code can easily construct the entire desired value. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- arch/arm/cpu/arm720t/tegra124/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm720t/tegra124/cpu.c b/arch/arm/cpu/arm720t/tegra124/cpu.c index c03aaf1..97f5928 100644 --- a/arch/arm/cpu/arm720t/tegra124/cpu.c +++ b/arch/arm/cpu/arm720t/tegra124/cpu.c @@ -252,8 +252,8 @@ void start_cpu(u32 reset_vector) tegra124_init_clocks(); /* Set power-gating timer multiplier */ - clrbits_le32(&pmc->pmc_pwrgate_timer_mult, TIMER_MULT_MASK); - setbits_le32(&pmc->pmc_pwrgate_timer_mult, MULT_8); + writel((MULT_8 << TIMER_MULT_SHIFT) | (MULT_8 << TIMER_MULT_CPU_SHIFT), + &pmc->pmc_pwrgate_timer_mult); enable_cpu_power_rail(); enable_cpu_clocks(); -- cgit v1.1 From 716ff5ce1df460f75f32009b85e77962c993290c Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 3 Feb 2014 14:03:27 -0700 Subject: ARM: tegra: simplify halt_avp() In order to completely halt the AVP processor, we should simply write FLOW_MODE_STOP without any extra options that allow wakeup. Amend the code to do this. I believe that enabling FIQ_1 and IRQ_1 allow the CPU to be awoken by interrupts. We don't want this; if later SW wishes to use the AVP, it should be reset and booted from scratch. Related, the bits that were previously IRQ_1 and FIQ_1 have a slightly different definition starting with Tegra114, so the values we're writing don't entirely make sense there anyway. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- arch/arm/cpu/arm720t/tegra-common/cpu.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c b/arch/arm/cpu/arm720t/tegra-common/cpu.c index 2c5cd63..168f525 100644 --- a/arch/arm/cpu/arm720t/tegra-common/cpu.c +++ b/arch/arm/cpu/arm720t/tegra-common/cpu.c @@ -378,8 +378,7 @@ void clock_enable_coresight(int enable) void halt_avp(void) { for (;;) { - writel((HALT_COP_EVENT_JTAG | HALT_COP_EVENT_IRQ_1 \ - | HALT_COP_EVENT_FIQ_1 | (FLOW_MODE_STOP<<29)), - FLOW_CTLR_HALT_COP_EVENTS); + writel(HALT_COP_EVENT_JTAG | (FLOW_MODE_STOP << 29), + FLOW_CTLR_HALT_COP_EVENTS); } } -- cgit v1.1 From cd2e46cb38d5aeada2b2c2f881cdc6baa672dc09 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 5 Mar 2014 16:59:38 +0900 Subject: kbuild: add CONFIG_ prefix to USE_PRIVATE_LIBGCC Before this commit, USE_PRIVATE_LIBGCC was defined in arch-specific config.mk and referenced in arch/$(ARCH)/lib/Makefile. We are not happy about parsing config.mk again and again. We have to keep the same behavior with a different way. By adding "CONFIG_" prefix, this macro appears in include/autoconf.mk, include/spl-autoconf.mk. (And treating USE_PRIVATE_LIBGCC as CONFIG macro is reasonable enough.) Tegra SoC family defined USE_PRIVATE_LIBGCC as "yes" in arch/arm/cpu/arm720t/tegra*/config.mk, whereas did not define it in arch/arm/cpu/armv7/tegra*/config.mk. It means Tegra enables PRIVATE_LIBGCC only for SPL. We can describe the same behavior by adding #ifdef CONFIG_SPL_BUILD # define CONFIG_USE_PRIVATE_LIBGCC #endif to include/configs/tegra-common.h. Signed-off-by: Masahiro Yamada Cc: Tom Warren Cc: Simon Glass Acked-by: Stephen Warren --- arch/arm/cpu/arm720t/tegra114/config.mk | 19 ------------------- arch/arm/cpu/arm720t/tegra124/config.mk | 7 ------- arch/arm/cpu/arm720t/tegra20/config.mk | 10 ---------- arch/arm/cpu/arm720t/tegra30/config.mk | 19 ------------------- 4 files changed, 55 deletions(-) delete mode 100644 arch/arm/cpu/arm720t/tegra114/config.mk delete mode 100644 arch/arm/cpu/arm720t/tegra124/config.mk delete mode 100644 arch/arm/cpu/arm720t/tegra20/config.mk delete mode 100644 arch/arm/cpu/arm720t/tegra30/config.mk (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm720t/tegra114/config.mk b/arch/arm/cpu/arm720t/tegra114/config.mk deleted file mode 100644 index 7947b50..0000000 --- a/arch/arm/cpu/arm720t/tegra114/config.mk +++ /dev/null @@ -1,19 +0,0 @@ -# -# Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, -# -# This program is free software; you can redistribute it and/or modify it -# under the terms and conditions of the GNU General Public License, -# version 2, as published by the Free Software Foundation. -# -# This program is distributed in the hope it will be useful, but WITHOUT -# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -# more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -USE_PRIVATE_LIBGCC = yes diff --git a/arch/arm/cpu/arm720t/tegra124/config.mk b/arch/arm/cpu/arm720t/tegra124/config.mk deleted file mode 100644 index 5e10701..0000000 --- a/arch/arm/cpu/arm720t/tegra124/config.mk +++ /dev/null @@ -1,7 +0,0 @@ -# -# (C) Copyright 2010-2013 -# NVIDIA Corporation -# -# SPDX-License-Identifier: GPL-2.0+ -#/ -USE_PRIVATE_LIBGCC = yes diff --git a/arch/arm/cpu/arm720t/tegra20/config.mk b/arch/arm/cpu/arm720t/tegra20/config.mk deleted file mode 100644 index e073345..0000000 --- a/arch/arm/cpu/arm720t/tegra20/config.mk +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2010,2011 -# NVIDIA Corporation -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, -# -# SPDX-License-Identifier: GPL-2.0+ -# -USE_PRIVATE_LIBGCC = yes diff --git a/arch/arm/cpu/arm720t/tegra30/config.mk b/arch/arm/cpu/arm720t/tegra30/config.mk deleted file mode 100644 index 2388c56..0000000 --- a/arch/arm/cpu/arm720t/tegra30/config.mk +++ /dev/null @@ -1,19 +0,0 @@ -# -# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, -# -# This program is free software; you can redistribute it and/or modify it -# under the terms and conditions of the GNU General Public License, -# version 2, as published by the Free Software Foundation. -# -# This program is distributed in the hope it will be useful, but WITHOUT -# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -# more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -USE_PRIVATE_LIBGCC = yes -- cgit v1.1 From 81724e09a018cf002be1bbb1a89b4b25e5b6f5c4 Mon Sep 17 00:00:00 2001 From: Andreas Henriksson Date: Mon, 27 Jan 2014 19:18:59 +0100 Subject: at91sam9263ek: add mmc support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for using the Atmel MCI driver on at91sam9263ek. This change is modeled after the existing at91sam9260ek support. Please note that this hooks up slot1 (MCI1) for SD. Not both. Tested with at91bootstrap and u-boot on dataflash in slot 0 and fat-formatted 8GB SDHC in slot 1 on first revision at91sam9263ek (which must use dataflash in slot0 to boot). CONFIG_ATMEL_MCI_PORTB not tested. Signed-off-by: Andreas Henriksson [remove empty line] Signed-off-by: Andreas Bießmann --- arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c | 25 +++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c index 99a3913..6b51d5f 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c @@ -143,6 +143,31 @@ void at91_spi1_hw_init(unsigned long cs_mask) } #endif +#if defined(CONFIG_GENERIC_ATMEL_MCI) +void at91_mci_hw_init(void) +{ + /* Enable mci clock */ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + writel(1 << ATMEL_ID_MCI1, &pmc->pcer); + + at91_set_a_periph(AT91_PIO_PORTA, 6, PUP); /* MCI1_CK */ + +#if defined(CONFIG_ATMEL_MCI_PORTB) + at91_set_a_periph(AT91_PIO_PORTA, 21, PUP); /* MCI1_CDB */ + at91_set_a_periph(AT91_PIO_PORTA, 22, PUP); /* MCI1_DB0 */ + at91_set_a_periph(AT91_PIO_PORTA, 23, PUP); /* MCI1_DB1 */ + at91_set_a_periph(AT91_PIO_PORTA, 24, PUP); /* MCI1_DB2 */ + at91_set_a_periph(AT91_PIO_PORTA, 25, PUP); /* MCI1_DB3 */ +#else + at91_set_a_periph(AT91_PIO_PORTA, 7, PUP); /* MCI1_CDA */ + at91_set_a_periph(AT91_PIO_PORTA, 8, PUP); /* MCI1_DA0 */ + at91_set_a_periph(AT91_PIO_PORTA, 9, PUP); /* MCI1_DA1 */ + at91_set_a_periph(AT91_PIO_PORTA, 10, PUP); /* MCI1_DA2 */ + at91_set_a_periph(AT91_PIO_PORTA, 11, PUP); /* MCI1_DA3 */ +#endif +} +#endif + #ifdef CONFIG_MACB void at91_macb_hw_init(void) { -- cgit v1.1 From 8a45b0ba87649b1bad459fb235a843f5588a8251 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Mon, 3 Mar 2014 14:47:15 +0800 Subject: arm: atmel: sama5d3: add spi spl boot support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add SPI SPL boot support for sama5d3xek board. Signed-off-by: Bo Shen Signed-off-by: Andreas Bießmann --- arch/arm/cpu/at91-common/spl.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/at91-common/spl.c b/arch/arm/cpu/at91-common/spl.c index 37c0cc4..2598e09 100644 --- a/arch/arm/cpu/at91-common/spl.c +++ b/arch/arm/cpu/at91-common/spl.c @@ -52,6 +52,8 @@ u32 spl_boot_device(void) { #ifdef CONFIG_SYS_USE_MMC return BOOT_DEVICE_MMC1; +#elif CONFIG_SYS_USE_SERIALFLASH + return BOOT_DEVICE_SPI; #endif return BOOT_DEVICE_NONE; } -- cgit v1.1 From 27019e4a949fc3be2e895ac20839c4d4d119f902 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Mon, 3 Mar 2014 14:47:17 +0800 Subject: arm: atmel: sama5d3: add nand spl boot support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add NAND SPL boot support with hardware PMECC. Signed-off-by: Bo Shen Signed-off-by: Andreas Bießmann --- arch/arm/cpu/at91-common/spl.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/at91-common/spl.c b/arch/arm/cpu/at91-common/spl.c index 2598e09..7f4debb 100644 --- a/arch/arm/cpu/at91-common/spl.c +++ b/arch/arm/cpu/at91-common/spl.c @@ -52,6 +52,8 @@ u32 spl_boot_device(void) { #ifdef CONFIG_SYS_USE_MMC return BOOT_DEVICE_MMC1; +#elif CONFIG_SYS_USE_NANDFLASH + return BOOT_DEVICE_NAND; #elif CONFIG_SYS_USE_SERIALFLASH return BOOT_DEVICE_SPI; #endif -- cgit v1.1 From b8dfcdb7d3e3442ba9f5a593ecaac7d8bc5fa921 Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Fri, 7 Mar 2014 14:59:38 +0100 Subject: exynos4:pinmux:fdt: decode peripheral id This patch adds api to decode peripheral id based on interrupt number. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/pinmux.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index 645c497..8d6e5c1 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -741,6 +741,21 @@ int exynos_pinmux_config(int peripheral, int flags) } #ifdef CONFIG_OF_CONTROL +static int exynos4_pinmux_decode_periph_id(const void *blob, int node) +{ + int err; + u32 cell[3]; + + err = fdtdec_get_int_array(blob, node, "interrupts", cell, + ARRAY_SIZE(cell)); + if (err) { + debug(" invalid peripheral id\n"); + return PERIPH_ID_NONE; + } + + return cell[1]; +} + static int exynos5_pinmux_decode_periph_id(const void *blob, int node) { int err; @@ -758,6 +773,8 @@ int pinmux_decode_periph_id(const void *blob, int node) { if (cpu_is_exynos5()) return exynos5_pinmux_decode_periph_id(blob, node); + else if (cpu_is_exynos4()) + return exynos4_pinmux_decode_periph_id(blob, node); else return PERIPH_ID_NONE; } -- cgit v1.1 From d73f38f7ba4d8a6309b4c35830e46935c4cd6a55 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 5 Mar 2014 14:57:47 -0500 Subject: am33xx: Rework #ifdef's around s_init for clarity The s_init function is only called on SPL or XIP cases, so lets only build it for them. This makes the #if logic within the function a bit clearer as to when we are or are not calling things, and makes it easier to see that for example preloader_console_init isn't ever called in the non-XIP full U-Boot case. Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/am33xx/board.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 2b15a64..fb44cc8 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -202,6 +202,7 @@ static void watchdog_disable(void) } #endif +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) void s_init(void) { /* @@ -220,22 +221,19 @@ void s_init(void) #ifdef CONFIG_SPL_BUILD save_omap_boot_params(); #endif -#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) watchdog_disable(); timer_init(); set_uart_mux_conf(); setup_clocks_for_console(); uart_soft_reset(); -#endif #ifdef CONFIG_NOR_BOOT gd->baudrate = CONFIG_BAUDRATE; serial_init(); gd->have_console = 1; -#else +#elif defined(CONFIG_SPL_BUILD) gd = &gdata; preloader_console_init(); #endif -#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) prcm_init(); set_mux_conf_regs(); #if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC) @@ -243,8 +241,8 @@ void s_init(void) rtc32k_enable(); #endif sdram_init(); -#endif } +#endif #ifndef CONFIG_SYS_DCACHE_OFF void enable_caches(void) -- cgit v1.1 From 07e27ce013ddb28c5c0725d65b1aa28fd95fcd87 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 11 Mar 2014 11:05:11 +0900 Subject: kbuild,mxs: use short logs for MXS images Signed-off-by: Masahiro Yamada Cc: Fabio Estevam Cc: Otavio Salvador Cc: Lauri Hintsala Acked-by: Marek Vasut --- arch/arm/cpu/arm926ejs/mxs/Makefile | 13 +++++++------ arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg | 4 ++-- arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg | 4 ++-- arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd | 4 ++-- arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd | 4 ++-- 5 files changed, 15 insertions(+), 14 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile b/arch/arm/cpu/arm926ejs/mxs/Makefile index 152546e..1eee661 100644 --- a/arch/arm/cpu/arm926ejs/mxs/Makefile +++ b/arch/arm/cpu/arm926ejs/mxs/Makefile @@ -14,11 +14,12 @@ obj-y += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o endif # Specify the target for use in elftosb call -MKIMAGE_TARGET-$(CONFIG_MX23) = mx23 -MKIMAGE_TARGET-$(CONFIG_MX28) = mx28 +MKIMAGE_TARGET-$(CONFIG_MX23) = mxsimage.mx23.cfg +MKIMAGE_TARGET-$(CONFIG_MX28) = mxsimage.mx28.cfg -$(OBJTREE)/mxsimage.cfg: $(SRCTREE)/$(CPUDIR)/$(SOC)/mxsimage.$(MKIMAGE_TARGET-y).cfg - sed "s@OBJTREE@$(OBJTREE)@g" $^ > $@ +quiet_cmd_mkimage_mxs = UIMAGE $@ +cmd_mkimage_mxs = $(objtree)/tools/mkimage -n $< -T mxsimage $@ \ + $(if $(KBUILD_VERBOSE:1=), >/dev/null) -$(OBJTREE)/u-boot.sb: $(OBJTREE)/u-boot.bin $(OBJTREE)/spl/u-boot-spl.bin $(OBJTREE)/mxsimage.cfg - $(OBJTREE)/tools/mkimage -n $(OBJTREE)/mxsimage.cfg -T mxsimage $@ +u-boot.sb: $(src)/$(MKIMAGE_TARGET-y) u-boot.bin spl/u-boot-spl.bin FORCE + $(call if_changed,mkimage_mxs) diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg index c9cf4b3..8118767 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg +++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg @@ -1,6 +1,6 @@ SECTION 0x0 BOOTABLE TAG LAST - LOAD 0x0 OBJTREE/spl/u-boot-spl.bin + LOAD 0x0 spl/u-boot-spl.bin CALL 0x14 0x0 - LOAD 0x40000100 OBJTREE/u-boot.bin + LOAD 0x40000100 u-boot.bin CALL 0x40000100 0x0 diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg index 676f5c8..ea772f0 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg +++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg @@ -1,8 +1,8 @@ SECTION 0x0 BOOTABLE TAG LAST - LOAD 0x0 OBJTREE/spl/u-boot-spl.bin + LOAD 0x0 spl/u-boot-spl.bin LOAD IVT 0x8000 0x14 CALL HAB 0x8000 0x0 - LOAD 0x40000100 OBJTREE/u-boot.bin + LOAD 0x40000100 u-boot.bin LOAD IVT 0x8000 0x40000100 CALL HAB 0x8000 0x0 diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd index 8b6c30e..3a51879 100644 --- a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd +++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd @@ -4,8 +4,8 @@ options { } sources { - u_boot_spl="OBJTREE/spl/u-boot-spl.bin"; - u_boot="OBJTREE/u-boot.bin"; + u_boot_spl="spl/u-boot-spl.bin"; + u_boot="u-boot.bin"; } section (0) { diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd index a5fa648..c60615a 100644 --- a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd +++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd @@ -1,6 +1,6 @@ sources { - u_boot_spl="OBJTREE/spl/u-boot-spl.bin"; - u_boot="OBJTREE/u-boot.bin"; + u_boot_spl="spl/u-boot-spl.bin"; + u_boot="u-boot.bin"; } section (0) { -- cgit v1.1 From 47c9c76b8afbcbe3d6e496dc2b0e4a72a488622a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 10 Mar 2014 20:04:31 +0100 Subject: arm: exynos: Squash bogus warnings in pinmux Squash these warnings in pinmux.c found with GCC 4.8: /arch/arm/cpu/armv7/exynos/pinmux.c: In function 'exynos_pinmux_config': /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'count' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:16: note: 'count' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'start' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:9: note: 'start' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:689:19: warning: 'bank' may be used uninitialized in this function [-Wmaybe-uninitialized] s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); ^ /arch/arm/cpu/armv7/exynos/pinmux.c:662:24: note: 'bank' was declared here struct s5p_gpio_bank *bank; ^ /arch/arm/cpu/armv7/exynos/pinmux.c: In function 'exynos_pinmux_config': /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'count' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:16: note: 'count' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'start' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:9: note: 'start' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:689:19: warning: 'bank' may be used uninitialized in this function [-Wmaybe-uninitialized] s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); ^ /arch/arm/cpu/armv7/exynos/pinmux.c:662:24: note: 'bank' was declared here struct s5p_gpio_bank *bank; ^ Note that the warning is bogus, the function can never be called with invalid 'peripheral' argument. GCC just cannot analyze this. Signed-off-by: Marek Vasut Cc: Naveen Krishna Chatradhi Cc: Akshay Saraswat Cc: Simon Glass Cc: Tom Rini Acked-by: Simon Glass Acked-by: Rajeshwari S Shinde Signed-off-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/pinmux.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index 8d6e5c1..9edb475 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -39,6 +39,9 @@ static void exynos5_uart_config(int peripheral) start = 4; count = 2; break; + default: + debug("%s: invalid peripheral %d", __func__, peripheral); + return; } for (i = start; i < start + count; i++) { s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE); @@ -74,6 +77,9 @@ static void exynos5420_uart_config(int peripheral) start = 4; count = 2; break; + default: + debug("%s: invalid peripheral %d", __func__, peripheral); + return; } for (i = start; i < start + count; i++) { @@ -110,6 +116,9 @@ static int exynos5_mmc_config(int peripheral, int flags) bank = &gpio1->c4; bank_ext = NULL; break; + default: + debug("%s: invalid peripheral %d", __func__, peripheral); + return -1; } if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) { debug("SDMMC device %d does not support 8bit mode", @@ -683,6 +692,9 @@ static void exynos4_uart_config(int peripheral) start = 4; count = 2; break; + default: + debug("%s: invalid peripheral %d", __func__, peripheral); + return; } for (i = start; i < start + count; i++) { s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE); -- cgit v1.1