From 0fc43a417c4ba5ab63dad6736a18f3bf7008f35f Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Thu, 4 Nov 2010 16:05:25 -0400 Subject: armv7, beagle: Second SDRAM bank don;t work since commit 3667cbeed5e3c4067e624e52a916b1ebb02c8f05 on beagle board the second sdram bank didn;t longer work. Since this patch sdram settings just get copied from bank a, but CMD_NOP, CMD_PRECHARGE, CMD_AUTOREFRESH are not executed and after that mr register is also not updated. This patch adds this for the bank b. Signed-off-by: Heiko Schocher cc: Steve Sakoman cc: Sandeep Paulraj cc: Wolfgang Denk Signed-off-by: Sandeep Paulraj --- arch/arm/cpu/armv7/omap3/sdrc.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index c75aa1d..a4979ce 100644 --- a/arch/arm/cpu/armv7/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c @@ -149,6 +149,13 @@ void do_sdrc_init(u32 cs, u32 early) &sdrc_actim_base1->ctrla); writel(readl(&sdrc_actim_base0->ctrlb), &sdrc_actim_base1->ctrlb); + + writel(CMD_NOP, &sdrc_base->cs[cs].manual); + writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual); + writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual); + writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual); + writel(readl(&sdrc_base->cs[CS0].mr), + &sdrc_base->cs[CS1].mr); } /* -- cgit v1.1 From aaeb0a890a050b58be87fa2b165eec5fa947dc86 Mon Sep 17 00:00:00 2001 From: Albert Aribaud Date: Mon, 15 Nov 2010 21:46:03 +0100 Subject: ARM: fix linker file for newer ld support older ld emitted all ELF relocations in input sections named .rel.dyn, whereas newer ld uses names of the form .rel*. The linker script only collected .rel.dyn input sections. Rewrite to collect all .rel* input sections. Signed-off-by: Albert Aribaud --- arch/arm/cpu/armv7/start.S | 24 ---------------------- arch/arm/cpu/armv7/u-boot.lds | 46 +++++++++++++++++++++++-------------------- 2 files changed, 25 insertions(+), 45 deletions(-) (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index bb3948d..2dfdafe 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -98,30 +98,6 @@ FIQ_STACK_START: IRQ_STACK_START_IN: .word 0x0badc0de -.globl _datarel_start_ofs -_datarel_start_ofs: - .word __datarel_start - _start - -.globl _datarelrolocal_start_ofs -_datarelrolocal_start_ofs: - .word __datarelrolocal_start - _start - -.globl _datarellocal_start_ofs -_datarellocal_start_ofs: - .word __datarellocal_start - _start - -.globl _datarelro_start_ofs -_datarelro_start_ofs: - .word __datarelro_start - _start - -.globl _got_start_ofs -_got_start_ofs: - .word __got_start - _start - -.globl _got_end_Ofs -_got_end_ofs: - .word __got_end - _start - /* * the actual reset code */ diff --git a/arch/arm/cpu/armv7/u-boot.lds b/arch/arm/cpu/armv7/u-boot.lds index 88a0fec..5725c30 100644 --- a/arch/arm/cpu/armv7/u-boot.lds +++ b/arch/arm/cpu/armv7/u-boot.lds @@ -44,34 +44,38 @@ SECTIONS . = ALIGN(4); .data : { *(.data) - __datarel_start = .; - *(.data.rel) - __datarelrolocal_start = .; - *(.data.rel.ro.local) - __datarellocal_start = .; - *(.data.rel.local) - __datarelro_start = .; - *(.data.rel.ro) } - . = ALIGN(4); - __rel_dyn_start = .; - .rel.dyn : { *(.rel.dyn) } - __rel_dyn_end = .; - - __dynsym_start = .; - .dynsym : { *(.dynsym) } - __got_start = .; . = ALIGN(4); - .got : { *(.got) } - __got_end = .; + . = .; __u_boot_cmd_start = .; .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; . = ALIGN(4); - __bss_start = .; - .bss : { *(.bss) } - _end = .; + + .rel.dyn : { + __rel_dyn_start = .; + *(.rel*) + __rel_dyn_end = .; + } + + .dynsym : { + __dynsym_start = .; + *(.dynsym) + } + + .bss __rel_dyn_start (OVERLAY) : { + __bss_start = .; + *(.bss) + . = ALIGN(4); + _end = .; + } + + /DISCARD/ : { *(.dynstr*) } + /DISCARD/ : { *(.dynamic*) } + /DISCARD/ : { *(.plt*) } + /DISCARD/ : { *(.interp*) } + /DISCARD/ : { *(.gnu*) } } -- cgit v1.1