From 5576aab5173e81462b852c35fe8d1c03c310afc2 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Tue, 11 Dec 2012 13:34:14 +0000 Subject: Tegra30: Add CPU (armv7) files These files are for code that runs on the CPU (A9) on T30 boards. At this time, there are no T30-specific ARMV7 files. As T30-specific run-time code is added, it'll go here. Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- arch/arm/cpu/armv7/tegra30/Makefile | 40 ++++++++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/tegra30/config.mk | 19 +++++++++++++++++ 2 files changed, 59 insertions(+) create mode 100644 arch/arm/cpu/armv7/tegra30/Makefile create mode 100644 arch/arm/cpu/armv7/tegra30/config.mk (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/tegra30/Makefile b/arch/arm/cpu/armv7/tegra30/Makefile new file mode 100644 index 0000000..04adb52 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra30/Makefile @@ -0,0 +1,40 @@ +# +# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).o + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/armv7/tegra30/config.mk b/arch/arm/cpu/armv7/tegra30/config.mk new file mode 100644 index 0000000..719ca81 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra30/config.mk @@ -0,0 +1,19 @@ +# +# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +CONFIG_ARCH_DEVICE_TREE := tegra30 -- cgit v1.1 From 6d6c0baebe14fd94b5462f098ce03b532e561759 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Tue, 11 Dec 2012 13:34:17 +0000 Subject: Tegra30: Add generic Tegra30 build support This patch adds basic Tegra30 (T30) build support - no specific board is targeted. Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/start.S | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 4fdbee4..ee8c2b3 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -32,7 +32,7 @@ COBJS += cache_v7.o COBJS += cpu.o COBJS += syslib.o -ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA20),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA),) SOBJS += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index dcc1f83..6b59529d 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -251,12 +251,12 @@ ENTRY(c_runtime_cpu_setup) /* * Move vector table */ -#if !defined(CONFIG_TEGRA20) +#if !defined(CONFIG_TEGRA) /* Set vector address in CP15 VBAR register */ ldr r0, =_start add r0, r0, r9 mcr p15, 0, r0, c12, c0, 0 @Set VBAR -#endif /* !Tegra20 */ +#endif /* !Tegra */ bx lr -- cgit v1.1 From 8ff43b03e9f38a6e136e2e20eec4e8b2eb4a1d3d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 13 Dec 2012 20:48:33 +0000 Subject: arm: Move tbu to arch_global_data Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass --- arch/arm/cpu/armv7/u8500/timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/u8500/timer.c b/arch/arm/cpu/armv7/u8500/timer.c index 79aad99..bb9165b 100644 --- a/arch/arm/cpu/armv7/u8500/timer.c +++ b/arch/arm/cpu/armv7/u8500/timer.c @@ -132,7 +132,7 @@ ulong get_timer(ulong base) /* * Emulation of Power architecture long long timebase. * - * TODO: Support gd->tbu for real long long timebase. + * TODO: Support gd->arch.tbu for real long long timebase. */ unsigned long long get_ticks(void) { -- cgit v1.1 From 66ee69234795c0596f84b25f06b7fbc2e8ed214c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 13 Dec 2012 20:48:34 +0000 Subject: arm: Move tbl to arch_global_data Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass --- arch/arm/cpu/armv7/omap-common/timer.c | 15 ++++++++------- arch/arm/cpu/armv7/s5p-common/timer.c | 8 ++++---- arch/arm/cpu/armv7/socfpga/timer.c | 8 ++++---- arch/arm/cpu/armv7/u8500/timer.c | 12 +++++++----- arch/arm/cpu/armv7/zynq/timer.c | 8 ++++---- 5 files changed, 27 insertions(+), 24 deletions(-) (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 9f8bc93..e321d53 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -57,7 +57,7 @@ int timer_init(void) /* reset time, capture current incrementer value time */ gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); - gd->tbl = 0; /* start "advancing" time stamp from 0 */ + gd->arch.tbl = 0; /* start "advancing" time stamp from 0 */ return 0; } @@ -91,14 +91,15 @@ ulong get_timer_masked(void) /* current tick value */ ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); - if (now >= gd->lastinc) /* normal mode (non roll) */ + if (now >= gd->lastinc) { /* normal mode (non roll) */ /* move stamp fordward with absoulte diff ticks */ - gd->tbl += (now - gd->lastinc); - else /* we have rollover of incrementer */ - gd->tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) - - gd->lastinc) + now; + gd->arch.tbl += (now - gd->lastinc); + } else { /* we have rollover of incrementer */ + gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK / + CONFIG_SYS_HZ)) - gd->lastinc) + now; + } gd->lastinc = now; - return gd->tbl; + return gd->arch.tbl; } /* diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index bb0e795..1566226 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -106,7 +106,7 @@ void reset_timer_masked(void) /* reset time */ gd->lastinc = readl(&timer->tcnto4); - gd->tbl = 0; + gd->arch.tbl = 0; } unsigned long get_timer_masked(void) @@ -124,13 +124,13 @@ unsigned long get_current_tick(void) unsigned long count_value = readl(&timer->tcntb4); if (gd->lastinc >= now) - gd->tbl += gd->lastinc - now; + gd->arch.tbl += gd->lastinc - now; else - gd->tbl += gd->lastinc + count_value - now; + gd->arch.tbl += gd->lastinc + count_value - now; gd->lastinc = now; - return gd->tbl; + return gd->arch.tbl; } /* diff --git a/arch/arm/cpu/armv7/socfpga/timer.c b/arch/arm/cpu/armv7/socfpga/timer.c index 321e9b4..a742121 100644 --- a/arch/arm/cpu/armv7/socfpga/timer.c +++ b/arch/arm/cpu/armv7/socfpga/timer.c @@ -83,13 +83,13 @@ ulong get_timer_masked(void) if (gd->lastinc >= now) { /* normal mode (non roll) */ /* move stamp forward with absolute diff ticks */ - gd->tbl += gd->lastinc - now; + gd->arch.tbl += gd->lastinc - now; } else { /* we have overflow of the count down timer */ - gd->tbl += TIMER_LOAD_VAL - gd->lastinc + now; + gd->arch.tbl += TIMER_LOAD_VAL - gd->lastinc + now; } gd->lastinc = now; - return gd->tbl; + return gd->arch.tbl; } /* @@ -100,5 +100,5 @@ void reset_timer(void) /* capture current decrementer value time */ gd->lastinc = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ); /* start "advancing" time stamp from 0 */ - gd->tbl = 0; + gd->arch.tbl = 0; } diff --git a/arch/arm/cpu/armv7/u8500/timer.c b/arch/arm/cpu/armv7/u8500/timer.c index bb9165b..a20897b 100644 --- a/arch/arm/cpu/armv7/u8500/timer.c +++ b/arch/arm/cpu/armv7/u8500/timer.c @@ -100,12 +100,14 @@ ulong get_timer_masked(void) /* current tick value */ ulong now = TICKS_TO_HZ(READ_TIMER()); - if (now >= gd->lastinc) /* normal (non rollover) */ - gd->tbl += (now - gd->lastinc); - else /* rollover */ - gd->tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - gd->lastinc) + now; + if (now >= gd->lastinc) { /* normal (non rollover) */ + gd->arch.tbl += (now - gd->lastinc); + } else { /* rollover */ + gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - gd->lastinc) + + now; + } gd->lastinc = now; - return gd->tbl; + return gd->arch.tbl; } /* Delay x useconds */ diff --git a/arch/arm/cpu/armv7/zynq/timer.c b/arch/arm/cpu/armv7/zynq/timer.c index 323e7b5..e126ebb 100644 --- a/arch/arm/cpu/armv7/zynq/timer.c +++ b/arch/arm/cpu/armv7/zynq/timer.c @@ -85,7 +85,7 @@ int timer_init(void) /* Reset time */ gd->lastinc = readl(&timer_base->counter) / (TIMER_TICK_HZ / CONFIG_SYS_HZ); - gd->tbl = 0; + gd->arch.tbl = 0; return 0; } @@ -102,14 +102,14 @@ ulong get_timer_masked(void) if (gd->lastinc >= now) { /* Normal mode */ - gd->tbl += gd->lastinc - now; + gd->arch.tbl += gd->lastinc - now; } else { /* We have an overflow ... */ - gd->tbl += gd->lastinc + TIMER_LOAD_VAL - now; + gd->arch.tbl += gd->lastinc + TIMER_LOAD_VAL - now; } gd->lastinc = now; - return gd->tbl; + return gd->arch.tbl; } void __udelay(unsigned long usec) -- cgit v1.1 From 582601da2f90b1850aa19f7820b1623c79b3dac6 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 13 Dec 2012 20:48:35 +0000 Subject: arm: Move lastinc to arch_global_data Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass --- arch/arm/cpu/armv7/omap-common/timer.c | 11 ++++++----- arch/arm/cpu/armv7/s5p-common/timer.c | 10 +++++----- arch/arm/cpu/armv7/socfpga/timer.c | 11 ++++++----- arch/arm/cpu/armv7/u8500/timer.c | 10 +++++----- arch/arm/cpu/armv7/zynq/timer.c | 10 +++++----- 5 files changed, 27 insertions(+), 25 deletions(-) (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index e321d53..36bea5f 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -56,7 +56,8 @@ int timer_init(void) &timer_base->tclr); /* reset time, capture current incrementer value time */ - gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); + gd->arch.lastinc = readl(&timer_base->tcrr) / + (TIMER_CLOCK / CONFIG_SYS_HZ); gd->arch.tbl = 0; /* start "advancing" time stamp from 0 */ return 0; @@ -91,14 +92,14 @@ ulong get_timer_masked(void) /* current tick value */ ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); - if (now >= gd->lastinc) { /* normal mode (non roll) */ + if (now >= gd->arch.lastinc) { /* normal mode (non roll) */ /* move stamp fordward with absoulte diff ticks */ - gd->arch.tbl += (now - gd->lastinc); + gd->arch.tbl += (now - gd->arch.lastinc); } else { /* we have rollover of incrementer */ gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK / - CONFIG_SYS_HZ)) - gd->lastinc) + now; + CONFIG_SYS_HZ)) - gd->arch.lastinc) + now; } - gd->lastinc = now; + gd->arch.lastinc = now; return gd->arch.tbl; } diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 1566226..e78c716 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -105,7 +105,7 @@ void reset_timer_masked(void) struct s5p_timer *const timer = s5p_get_base_timer(); /* reset time */ - gd->lastinc = readl(&timer->tcnto4); + gd->arch.lastinc = readl(&timer->tcnto4); gd->arch.tbl = 0; } @@ -123,12 +123,12 @@ unsigned long get_current_tick(void) unsigned long now = readl(&timer->tcnto4); unsigned long count_value = readl(&timer->tcntb4); - if (gd->lastinc >= now) - gd->arch.tbl += gd->lastinc - now; + if (gd->arch.lastinc >= now) + gd->arch.tbl += gd->arch.lastinc - now; else - gd->arch.tbl += gd->lastinc + count_value - now; + gd->arch.tbl += gd->arch.lastinc + count_value - now; - gd->lastinc = now; + gd->arch.lastinc = now; return gd->arch.tbl; } diff --git a/arch/arm/cpu/armv7/socfpga/timer.c b/arch/arm/cpu/armv7/socfpga/timer.c index a742121..efa28c2 100644 --- a/arch/arm/cpu/armv7/socfpga/timer.c +++ b/arch/arm/cpu/armv7/socfpga/timer.c @@ -80,15 +80,15 @@ ulong get_timer_masked(void) { /* current tick value */ ulong now = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ); - if (gd->lastinc >= now) { + if (gd->arch.lastinc >= now) { /* normal mode (non roll) */ /* move stamp forward with absolute diff ticks */ - gd->arch.tbl += gd->lastinc - now; + gd->arch.tbl += gd->arch.lastinc - now; } else { /* we have overflow of the count down timer */ - gd->arch.tbl += TIMER_LOAD_VAL - gd->lastinc + now; + gd->arch.tbl += TIMER_LOAD_VAL - gd->arch.lastinc + now; } - gd->lastinc = now; + gd->arch.lastinc = now; return gd->arch.tbl; } @@ -98,7 +98,8 @@ ulong get_timer_masked(void) void reset_timer(void) { /* capture current decrementer value time */ - gd->lastinc = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ); + gd->arch.lastinc = read_timer() / + (CONFIG_TIMER_CLOCK_KHZ / CONFIG_SYS_HZ); /* start "advancing" time stamp from 0 */ gd->arch.tbl = 0; } diff --git a/arch/arm/cpu/armv7/u8500/timer.c b/arch/arm/cpu/armv7/u8500/timer.c index a20897b..a4b88f3 100644 --- a/arch/arm/cpu/armv7/u8500/timer.c +++ b/arch/arm/cpu/armv7/u8500/timer.c @@ -100,13 +100,13 @@ ulong get_timer_masked(void) /* current tick value */ ulong now = TICKS_TO_HZ(READ_TIMER()); - if (now >= gd->lastinc) { /* normal (non rollover) */ - gd->arch.tbl += (now - gd->lastinc); + if (now >= gd->arch.lastinc) { /* normal (non rollover) */ + gd->arch.tbl += (now - gd->arch.lastinc); } else { /* rollover */ - gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - gd->lastinc) - + now; + gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - + gd->arch.lastinc) + now; } - gd->lastinc = now; + gd->arch.lastinc = now; return gd->arch.tbl; } diff --git a/arch/arm/cpu/armv7/zynq/timer.c b/arch/arm/cpu/armv7/zynq/timer.c index e126ebb..45b405a 100644 --- a/arch/arm/cpu/armv7/zynq/timer.c +++ b/arch/arm/cpu/armv7/zynq/timer.c @@ -83,7 +83,7 @@ int timer_init(void) emask); /* Reset time */ - gd->lastinc = readl(&timer_base->counter) / + gd->arch.lastinc = readl(&timer_base->counter) / (TIMER_TICK_HZ / CONFIG_SYS_HZ); gd->arch.tbl = 0; @@ -100,14 +100,14 @@ ulong get_timer_masked(void) now = readl(&timer_base->counter) / (TIMER_TICK_HZ / CONFIG_SYS_HZ); - if (gd->lastinc >= now) { + if (gd->arch.lastinc >= now) { /* Normal mode */ - gd->arch.tbl += gd->lastinc - now; + gd->arch.tbl += gd->arch.lastinc - now; } else { /* We have an overflow ... */ - gd->arch.tbl += gd->lastinc + TIMER_LOAD_VAL - now; + gd->arch.tbl += gd->arch.lastinc + TIMER_LOAD_VAL - now; } - gd->lastinc = now; + gd->arch.lastinc = now; return gd->arch.tbl; } -- cgit v1.1 From 59c651f4e2b7614e97c2fda10eeabd00529dd740 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 4 Feb 2013 12:38:59 +0100 Subject: arm: zynq: Add SLCR support with system reset The patch provides slcr base address initialization support and a support to reset the cpu through slcr driver, hence removed the reset_cpu() from board.c. Signed-off-by: Jagannadha Sutradharudu Teki Signed-off-by: Michal Simek --- arch/arm/cpu/armv7/zynq/Makefile | 1 + arch/arm/cpu/armv7/zynq/cpu.c | 2 ++ arch/arm/cpu/armv7/zynq/slcr.c | 63 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 66 insertions(+) create mode 100644 arch/arm/cpu/armv7/zynq/slcr.c (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/zynq/Makefile b/arch/arm/cpu/armv7/zynq/Makefile index 499ace4..388085d 100644 --- a/arch/arm/cpu/armv7/zynq/Makefile +++ b/arch/arm/cpu/armv7/zynq/Makefile @@ -30,6 +30,7 @@ LIB = $(obj)lib$(SOC).o COBJS-y := timer.o COBJS-y += cpu.o +COBJS-y += slcr.o COBJS := $(COBJS-y) diff --git a/arch/arm/cpu/armv7/zynq/cpu.c b/arch/arm/cpu/armv7/zynq/cpu.c index ab615cc..91618d3 100644 --- a/arch/arm/cpu/armv7/zynq/cpu.c +++ b/arch/arm/cpu/armv7/zynq/cpu.c @@ -21,11 +21,13 @@ * MA 02111-1307 USA */ #include +#include inline void lowlevel_init(void) {} void reset_cpu(ulong addr) { + zynq_slcr_cpu_reset(); while (1) ; } diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c new file mode 100644 index 0000000..788a8fd --- /dev/null +++ b/arch/arm/cpu/armv7/zynq/slcr.c @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2013 Xilinx Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +#define SLCR_LOCK_MAGIC 0x767B +#define SLCR_UNLOCK_MAGIC 0xDF0D + +static int slcr_lock = 1; /* 1 means locked, 0 means unlocked */ + +void zynq_slcr_lock(void) +{ + if (!slcr_lock) + writel(SLCR_LOCK_MAGIC, &slcr_base->slcr_lock); +} + +void zynq_slcr_unlock(void) +{ + if (slcr_lock) + writel(SLCR_UNLOCK_MAGIC, &slcr_base->slcr_unlock); +} + +/* Reset the entire system */ +void zynq_slcr_cpu_reset(void) +{ + /* + * Unlock the SLCR then reset the system. + * Note that this seems to require raw i/o + * functions or there's a lockup? + */ + zynq_slcr_unlock(); + + /* + * Clear 0x0F000000 bits of reboot status register to workaround + * the FSBL not loading the bitstream after soft-reboot + * This is a temporary solution until we know more. + */ + clrbits_le32(&slcr_base->reboot_status, 0xF000000); + + writel(1, &slcr_base->pss_rst_ctrl); +} -- cgit v1.1 From 00ed34589880ca7092999ec5b92e061018d0fd0f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 4 Feb 2013 12:42:25 +0100 Subject: arm: zynq: Add lowlevel initialization to C Do lowlevel initialization directly in C. Zynq do not require to do it in asm. Signed-off-by: Michal Simek --- arch/arm/cpu/armv7/zynq/cpu.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/zynq/cpu.c b/arch/arm/cpu/armv7/zynq/cpu.c index 91618d3..e8f4c19 100644 --- a/arch/arm/cpu/armv7/zynq/cpu.c +++ b/arch/arm/cpu/armv7/zynq/cpu.c @@ -21,9 +21,33 @@ * MA 02111-1307 USA */ #include +#include #include +#include -inline void lowlevel_init(void) {} +void lowlevel_init(void) +{ + zynq_slcr_unlock(); + /* remap DDR to zero, FILTERSTART */ + writel(0, &scu_base->filter_start); + + /* Device config APB, unlock the PCAP */ + writel(0x757BDF0D, &devcfg_base->unlock); + writel(0xFFFFFFFF, &devcfg_base->rom_shadow); + + /* OCM_CFG, Mask out the ROM, map ram into upper addresses */ + writel(0x1F, &slcr_base->ocm_cfg); + /* FPGA_RST_CTRL, clear resets on AXI fabric ports */ + writel(0x0, &slcr_base->fpga_rst_ctrl); + /* TZ_DDR_RAM, Set DDR trust zone non-secure */ + writel(0xFFFFFFFF, &slcr_base->trust_zone); + /* Set urgent bits with register */ + writel(0x0, &slcr_base->ddr_urgent_sel); + /* Urgent write, ports S2/S3 */ + writel(0xC, &slcr_base->ddr_urgent); + + zynq_slcr_lock(); +} void reset_cpu(ulong addr) { -- cgit v1.1 From ec1885cee13bb52ff60ea68896e6ca8aeb99f9f2 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Mon, 28 Jan 2013 13:32:09 +0000 Subject: Tegra114: Add CPU (armv7) files These files are for code that runs on the CPU (A15) on T114 boards. At this time, there is no A15-specific code here. As T114-specific run-time code is added, it'll go here. Signed-off-by: Tom Warren --- arch/arm/cpu/armv7/tegra114/Makefile | 40 +++++++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/tegra114/config.mk | 19 +++++++++++++++++ 2 files changed, 59 insertions(+) create mode 100644 arch/arm/cpu/armv7/tegra114/Makefile create mode 100644 arch/arm/cpu/armv7/tegra114/config.mk (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/tegra114/Makefile b/arch/arm/cpu/armv7/tegra114/Makefile new file mode 100644 index 0000000..eb98c8e --- /dev/null +++ b/arch/arm/cpu/armv7/tegra114/Makefile @@ -0,0 +1,40 @@ +# +# Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).o + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/armv7/tegra114/config.mk b/arch/arm/cpu/armv7/tegra114/config.mk new file mode 100644 index 0000000..cb1a19d --- /dev/null +++ b/arch/arm/cpu/armv7/tegra114/config.mk @@ -0,0 +1,19 @@ +# +# Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +CONFIG_ARCH_DEVICE_TREE := tegra114 -- cgit v1.1 From da07c21b77aaa4633caffb804aad23a809c233b4 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 5 Feb 2013 11:36:25 +0000 Subject: am33xx: support for booting via usbeth This patch adds BOOT_DEVICE define for USB booting and fixes spl_board_init function to call arch_misc_init (this is the place there musb is initialized). Signed-off-by: Ilya Yanok --- arch/arm/cpu/armv7/omap-common/boot-common.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c index 2b584e0..1c8b617 100644 --- a/arch/arm/cpu/armv7/omap-common/boot-common.c +++ b/arch/arm/cpu/armv7/omap-common/boot-common.c @@ -55,6 +55,9 @@ void spl_board_init(void) #ifdef CONFIG_SPL_NAND_SUPPORT gpmc_init(); #endif +#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT) + arch_misc_init(); +#endif } int board_mmc_init(bd_t *bis) -- cgit v1.1