From 5abc00d02082056765a8029675e7b05ab6c35263 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Fri, 31 Oct 2014 08:31:04 +0100 Subject: arm, spl, at91: add at91sam9260 and at91sam9g45 spl support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit add support for using spl code on at91sam9260 and at91sam9g45 based boards. Signed-off-by: Heiko Schocher Reviewed-by: Bo Shen Reviewed-by: Andreas Bießmann [adopt Bo's change in spl.c] Signed-off-by: Andreas Bießmann --- arch/arm/cpu/armv7/at91/clock.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'arch/arm/cpu/armv7') diff --git a/arch/arm/cpu/armv7/at91/clock.c b/arch/arm/cpu/armv7/at91/clock.c index 36ed4a6..2cdddb2 100644 --- a/arch/arm/cpu/armv7/at91/clock.c +++ b/arch/arm/cpu/armv7/at91/clock.c @@ -111,6 +111,35 @@ int at91_clock_init(unsigned long main_clock) return 0; } +void at91_plla_init(u32 pllar) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + + writel(pllar, &pmc->pllar); + while (!(readl(&pmc->sr) & (AT91_PMC_LOCKA | AT91_PMC_MCKRDY))) + ; +} + +void at91_mck_init(u32 mckr) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + u32 tmp; + + tmp = readl(&pmc->mckr); + tmp &= ~(AT91_PMC_MCKR_CSS_MASK | + AT91_PMC_MCKR_PRES_MASK | + AT91_PMC_MCKR_MDIV_MASK | + AT91_PMC_MCKR_PLLADIV_2); + tmp |= mckr & (AT91_PMC_MCKR_CSS_MASK | + AT91_PMC_MCKR_PRES_MASK | + AT91_PMC_MCKR_MDIV_MASK | + AT91_PMC_MCKR_PLLADIV_2); + writel(tmp, &pmc->mckr); + + while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) + ; +} + void at91_periph_clk_enable(int id) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; -- cgit v1.1