From 5894ca007d217a2fa845facfbb62c6512396a145 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 3 Oct 2014 19:21:06 +0900 Subject: ARM: UniPhier: add UniPhier SoC support code These are used by Panasonic UniPhier SoC family. Signed-off-by: Masahiro Yamada --- arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c | 28 ++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c (limited to 'arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c') diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c new file mode 100644 index 0000000..b4dd799 --- /dev/null +++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2011-2014 Panasonic Corporation + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +void sg_init(void) +{ + u32 tmp; + + /* Set DDR size */ + tmp = sg_memconf_val_ch0(CONFIG_SDRAM0_SIZE, CONFIG_DDR_NUM_CH0); + tmp |= sg_memconf_val_ch1(CONFIG_SDRAM1_SIZE, CONFIG_DDR_NUM_CH1); +#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE < CONFIG_SDRAM1_BASE + tmp |= SG_MEMCONF_SPARSEMEM; +#endif + writel(tmp, SG_MEMCONF); + + /* Input ports must be enabled deasserting reset of cores */ + tmp = readl(SG_IECTRL); + tmp |= 0x1; + writel(tmp, SG_IECTRL); +} -- cgit v1.1