From d9e73a87a9bf30fca8de0578007ae431f18e5434 Mon Sep 17 00:00:00 2001 From: Allen Martin Date: Fri, 31 Aug 2012 08:30:01 +0000 Subject: tegra20: move tegra20 SoC code to arch/arm/cpu/tegra20-common In preparation for splitting out the armv4t code from tegra20, move the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will be compiled armv4t for the arm7tdmi and armv7 for the cortex A9. Signed-off-by: Allen Martin Acked-by: Stephen Warren Tested-by: Thierry Reding Signed-off-by: Tom Warren --- arch/arm/cpu/armv7/tegra20/pmu.c | 70 ---------------------------------------- 1 file changed, 70 deletions(-) delete mode 100644 arch/arm/cpu/armv7/tegra20/pmu.c (limited to 'arch/arm/cpu/armv7/tegra20/pmu.c') diff --git a/arch/arm/cpu/armv7/tegra20/pmu.c b/arch/arm/cpu/armv7/tegra20/pmu.c deleted file mode 100644 index 53505e9..0000000 --- a/arch/arm/cpu/armv7/tegra20/pmu.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2010,2011 NVIDIA Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include - -#define VDD_CORE_NOMINAL_T25 0x17 /* 1.3v */ -#define VDD_CPU_NOMINAL_T25 0x10 /* 1.125v */ - -#define VDD_CORE_NOMINAL_T20 0x16 /* 1.275v */ -#define VDD_CPU_NOMINAL_T20 0x0f /* 1.1v */ - -#define VDD_RELATION 0x02 /* 50mv */ -#define VDD_TRANSITION_STEP 0x06 /* 150mv */ -#define VDD_TRANSITION_RATE 0x06 /* 3.52mv/us */ - -int pmu_set_nominal(void) -{ - int core, cpu, bus; - - /* by default, the table has been filled with T25 settings */ - switch (tegra_get_chip_type()) { - case TEGRA_SOC_T20: - core = VDD_CORE_NOMINAL_T20; - cpu = VDD_CPU_NOMINAL_T20; - break; - case TEGRA_SOC_T25: - core = VDD_CORE_NOMINAL_T25; - cpu = VDD_CPU_NOMINAL_T25; - break; - default: - debug("%s: Unknown chip type\n", __func__); - return -1; - } - - bus = tegra_i2c_get_dvc_bus_num(); - if (bus == -1) { - debug("%s: Cannot find DVC I2C bus\n", __func__); - return -1; - } - tps6586x_init(bus); - tps6586x_set_pwm_mode(TPS6586X_PWM_SM1); - return tps6586x_adjust_sm0_sm1(core, cpu, VDD_TRANSITION_STEP, - VDD_TRANSITION_RATE, VDD_RELATION); -} -- cgit v1.1