From 942cb0b6a29f74507adeb0bce7ff7f23f69faf84 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 10:47:30 -0700 Subject: sunxi: Normalise FEL support Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of creating its own. There are some #ifdefs required in start.S. Future work will hopefully remove these. This series is available at u-boot-dm, branch sunxi-working. Signed-off-by: Simon Glass Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/cpu/armv7/start.S | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/cpu/armv7/start.S') diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 9b49ece..098a83a 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -54,7 +54,8 @@ save_boot_params_ret: * (OMAP4 spl TEXT_BASE is not 32 byte aligned. * Continue to use ROM code vector only in OMAP4 spl) */ -#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) +#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) && \ + !defined(CONFIG_SPL_FEL) /* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */ mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register bic r0, #CR_V @ V = 0 @@ -67,7 +68,9 @@ save_boot_params_ret: /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT +#ifndef CONFIG_SPL_FEL bl cpu_init_cp15 +#endif bl cpu_init_crit #endif -- cgit v1.1