From bc45d5729fbec157370b826156cf45ce78471096 Mon Sep 17 00:00:00 2001 From: Hao Zhang Date: Wed, 22 Oct 2014 16:32:30 +0300 Subject: keystone2: msmc: add MSMC cache coherency support for K2L SOC This patch adds Keystone II Lamar (K2L) SoC specific definitions to support MSMC cache coherency. Acked-by: Vitaly Andrianov Signed-off-by: Hao Zhang Signed-off-by: Ivan Khoronzhuk --- arch/arm/cpu/armv7/keystone/init.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm/cpu/armv7/keystone') diff --git a/arch/arm/cpu/armv7/keystone/init.c b/arch/arm/cpu/armv7/keystone/init.c index a8f8aee..62081b7 100644 --- a/arch/arm/cpu/armv7/keystone/init.c +++ b/arch/arm/cpu/armv7/keystone/init.c @@ -25,12 +25,12 @@ int arch_cpu_init(void) chip_configuration_unlock(); icache_enable(); - msmc_share_all_segments(8); /* TETRIS */ - msmc_share_all_segments(9); /* NETCP */ - msmc_share_all_segments(10); /* QM PDSP */ - msmc_share_all_segments(11); /* PCIE 0 */ -#ifdef CONFIG_SOC_K2E - msmc_share_all_segments(13); /* PCIE 1 */ + msmc_share_all_segments(KS2_MSMC_SEGMENT_TETRIS); + msmc_share_all_segments(KS2_MSMC_SEGMENT_NETCP); + msmc_share_all_segments(KS2_MSMC_SEGMENT_QM_PDSP); + msmc_share_all_segments(KS2_MSMC_SEGMENT_PCIE0); +#if defined(CONFIG_SOC_K2E) || defined(CONFIG_SOC_K2L) + msmc_share_all_segments(KS2_MSMC_SEGMENT_PCIE1); #endif /* -- cgit v1.1