From b5bd09820c79dc92b3e5fb5be4b47ce22c731443 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 May 2016 07:28:06 -0600 Subject: arm: Allow skipping of low-level init with I-cache on MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit At present CONFIG_SKIP_LOWLEVEL_INIT prevents U-Boot from calling lowlevel_init(). This means that the instruction cache is not enabled and the board runs very slowly. What is really needed in many cases is to skip the call to lowlevel_init() but still perform CP15 init. Add an option to handle this. Reviewed-by: Heiko Schocher Tested-on: smartweb, corvus, taurus, axm Tested-by: Heiko Schocher Reviewed-by: Joe Hershberger Signed-off-by: Simon Glass Reviewed-by: Andreas Bießmann --- arch/arm/cpu/arm926ejs/start.S | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/cpu/arm926ejs') diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index f05113d..959d1ed 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -101,11 +101,13 @@ flush_dcache: #endif mcr p15, 0, r0, c1, c0, 0 +#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* * Go setup Memory and board specific bits prior to relocation. */ mov ip, lr /* perserve link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ +#endif mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -- cgit v1.1