From fa6c7413d1d5256516aad30b97eba3e4094c7ea3 Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Sun, 19 May 2013 01:48:14 +0000 Subject: arm: do not compile relocate_code() for SPL builds MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Albert ARIBAUD Reviewed-by: Benoît Thébaudeau Tested-by: Simon Glass --- arch/arm/cpu/arm920t/start.S | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) (limited to 'arch/arm/cpu/arm920t') diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 6250025..889329f 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -89,10 +89,6 @@ _TEXT_BASE: _bss_start_ofs: .word __bss_start - _start -.globl _image_copy_end_ofs -_image_copy_end_ofs: - .word __image_copy_end - _start - .globl _bss_end_ofs _bss_end_ofs: .word __bss_end - _start @@ -194,6 +190,7 @@ copyex: /*------------------------------------------------------------------------------*/ +#ifndef CONFIG_SPL_BUILD /* * void relocate_code(addr_moni) * @@ -216,7 +213,6 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -254,12 +250,12 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop -#endif - relocate_done: mov pc, lr +_image_copy_end_ofs: + .word __image_copy_end - _start _rel_dyn_start_ofs: .word __rel_dyn_start - _start _rel_dyn_end_ofs: @@ -267,6 +263,8 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start +#endif + .globl c_runtime_cpu_setup c_runtime_cpu_setup: -- cgit v1.1