From 5ff40f3d4226d45c78f3bb9db276f6685b24a89a Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Tue, 3 Feb 2015 13:58:12 +0300 Subject: arc: define and use PTAG AUX regs for MMUv3 only DC_PTAG and IC_PTAG registers only exist in MMUv3. Signed-off-by: Alexey Brodkin --- arch/arc/lib/cache.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arc/lib/cache.c') diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c index fa19a13..fa2a1e7 100644 --- a/arch/arc/lib/cache.c +++ b/arch/arc/lib/cache.c @@ -101,7 +101,7 @@ void flush_dcache_all(void) #ifndef CONFIG_SYS_DCACHE_OFF static void dcache_flush_line(unsigned addr) { -#if (CONFIG_ARC_MMU_VER > 2) +#if (CONFIG_ARC_MMU_VER == 3) write_aux_reg(ARC_AUX_DC_PTAG, addr); #endif write_aux_reg(ARC_AUX_DC_FLDL, addr); @@ -115,7 +115,7 @@ static void dcache_flush_line(unsigned addr) * Invalidate I$ for addresses range just flushed from D$. * If we try to execute data flushed above it will be valid/correct */ -#if (CONFIG_ARC_MMU_VER > 2) +#if (CONFIG_ARC_MMU_VER == 3) write_aux_reg(ARC_AUX_IC_PTAG, addr); #endif write_aux_reg(ARC_AUX_IC_IVIL, addr); @@ -145,7 +145,7 @@ void invalidate_dcache_range(unsigned long start, unsigned long end) end = end & (~(CONFIG_SYS_CACHELINE_SIZE - 1)); for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) { -#if (CONFIG_ARC_MMU_VER > 2) +#if (CONFIG_ARC_MMU_VER == 3) write_aux_reg(ARC_AUX_DC_PTAG, addr); #endif write_aux_reg(ARC_AUX_DC_IVDL, addr); -- cgit v1.1 From 205e7a7b77726abeff57576e2ecf2c6d4dc07ccf Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Tue, 3 Feb 2015 13:58:13 +0300 Subject: arc: select cache settings via menuconfig This change allows to keep board description clean and minimalistic. This is especially helpful if one board may house different CPUs with different features. It is applicable to both FPGA-based boards or those that have CPUs mounted on interchnagable daughter-boards. Signed-off-by: Alexey Brodkin --- arch/arc/lib/cache.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arc/lib/cache.c') diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c index fa2a1e7..a227723 100644 --- a/arch/arc/lib/cache.c +++ b/arch/arc/lib/cache.c @@ -6,6 +6,7 @@ #include #include +#include /* Bit values in IC_CTRL */ #define IC_CTRL_CACHE_DISABLE (1 << 0) -- cgit v1.1