From 690e425844511fe37d3315e86414d0a9e3accd1c Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Mon, 13 Jan 2014 11:28:04 +0530 Subject: powerpc:Rename CONFIG_PBLRCW_CONFIG & CONFIG_SYS_FSL_PBL_PBI Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG. Also add their details in README. Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- README | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'README') diff --git a/README b/README index aea82be..176de61 100644 --- a/README +++ b/README @@ -472,6 +472,15 @@ The following options need to be configured: Board config to use DDR3. It can be enabled for SoCs with Freescale DDR3 controllers. + CONFIG_SYS_FSL_PBL_PBI + It enables addition of RCW (Power on reset configuration) in built image. + Please refer doc/README.pblimage for more details + + CONFIG_SYS_FSL_PBL_RCW + It adds PBI(pre-boot instructions) commands in u-boot build image. + PBI commands can be used to configure SoC before it starts the execution. + Please refer doc/README.pblimage for more details + - Intel Monahans options: CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO -- cgit v1.1