From ff019a8c415296b9dad340a98f7bfead98404935 Mon Sep 17 00:00:00 2001 From: Nitin Garg Date: Tue, 1 Apr 2014 22:17:37 -0500 Subject: ENGR00306276-1: ARM: Add workaround for Cortex-A9 errata 794072 A short loop including a DMB instruction might cause a denial of service on another processor which executes a CP15 broadcast operation. Exists on r1, r2, r3, r4 revisions. Signed-off-by: Nitin Garg --- README | 1 + arch/arm/cpu/armv7/start.S | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/README b/README index 8b13b2a..d0f32ad 100644 --- a/README +++ b/README @@ -489,6 +489,7 @@ The following options need to be configured: CONFIG_ARM_ERRATA_742230 CONFIG_ARM_ERRATA_743622 CONFIG_ARM_ERRATA_751472 + CONFIG_ARM_ERRATA_794072 If set, the workarounds for these ARM errata are applied early during U-Boot startup. Note that these options force the diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index e9e57e6..38b6021 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -315,7 +315,7 @@ ENTRY(cpu_init_cp15) mcr p15, 0, r0, c1, c0, 0 @ write system control register #endif -#ifdef CONFIG_ARM_ERRATA_742230 +#if (defined(CONFIG_ARM_ERRATA_742230) || defined(CONFIG_ARM_ERRATA_794072)) mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register orr r0, r0, #1 << 4 @ set bit #4 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register -- cgit v1.1