From 2bcacc2d841b77f3d2d3910db722003742727e9f Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 22 Nov 2007 16:51:39 +0100 Subject: ATNGW100: Fix default mtest range Let mtest cover the whole SDRAM except the last megabyte, which is where u-boot lives. Signed-off-by: Haavard Skinnemoen --- include/configs/atngw100.h | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index 414e130..5aad043 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -170,13 +170,9 @@ #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) #define CFG_LONGHELP 1 -#define CFG_MEMTEST_START \ - ({ DECLARE_GLOBAL_DATA_PTR; gd->bd->bi_dram[0].start; }) -#define CFG_MEMTEST_END \ - ({ \ - DECLARE_GLOBAL_DATA_PTR; \ - gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; \ - }) +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x1f00000) + #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } #endif /* __CONFIG_H */ -- cgit v1.1 From 8269ab53608d8db2aa06969c337ab0b0518211e5 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 22 Nov 2007 17:01:24 +0100 Subject: ATSTK1002: Use SDRAM + 4MB as default load address Many people run into problems when they compile a big kernel and load the uImage at the default SDRAM + 2MB address as the kernel will overwrite the uImage as it is being unpacked. Increase the default load address so that we can load a 4MB kernel image without any problems. Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index b33e26f..95aeab6 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -184,8 +184,8 @@ #define CFG_MALLOC_LEN (256*1024) #define CFG_DMA_ALLOC_LEN (16384) -/* Allow 2MB for the kernel run-time image */ -#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00200000) +/* Allow 4MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00400000) #define CFG_BOOTPARAMS_LEN (16 * 1024) /* Other configuration settings that shouldn't have to change all that often */ -- cgit v1.1 From b2e1d5b64469f10dfcce27f7b0afd935684a8e11 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 22 Nov 2007 17:04:13 +0100 Subject: ATSTK1004: Fix comment about default load address The default load address is SDRAM + 2MB, not SDRAM + 4MB. The latter wouldn't have worked anyway since the board can only access 4MB of SDRAM. Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1004.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h index 1bad171..b81fc21 100644 --- a/include/configs/atstk1004.h +++ b/include/configs/atstk1004.h @@ -167,7 +167,7 @@ #define CFG_MALLOC_LEN (256*1024) -/* Allow 4MB for the kernel run-time image */ +/* Allow 2MB for the kernel run-time image */ #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00200000) #define CFG_BOOTPARAMS_LEN (16 * 1024) -- cgit v1.1 From 61151cccb660cdb06a07fb283de6089913d7bde0 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 19 Apr 2007 10:10:11 +0200 Subject: ATSTK1000: Fix potential flash programming bug The (now obsolete) atngw100 flash programming code was having problems programming the onboard at49bv642 chip. The atstk1000 flash programming code may have the same bug, so import fix for this problem from the AVR32 Linux BSP. Signed-off-by: Haavard Skinnemoen --- board/atmel/atstk1000/flash.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/board/atmel/atstk1000/flash.c b/board/atmel/atstk1000/flash.c index 93d790f..4047825 100644 --- a/board/atmel/atstk1000/flash.c +++ b/board/atmel/atstk1000/flash.c @@ -159,7 +159,7 @@ int __flashprog write_buff(flash_info_t *info, uchar *src, { unsigned long flags; uint16_t *base, *p, *s, *end; - uint16_t word, status; + uint16_t word, status, status1; int ret = ERR_OK; if (addr < info->start[0] @@ -194,20 +194,33 @@ int __flashprog write_buff(flash_info_t *info, uchar *src, sync_write_buffer(); /* Wait for completion */ + status1 = readw(p); do { /* TODO: Timeout */ - status = readw(p); - } while ((status != word) && !(status & 0x28)); + status = status1; + status1 = readw(p); + } while (((status ^ status1) & 0x40) /* toggled */ + && !(status1 & 0x28)); /* error bits */ - writew(0xf0, base); - readw(base); - - if (status != word) { - printf("Flash write error at address 0x%p: 0x%02x\n", - p, status); + /* + * We'll need to check once again for toggle bit + * because the toggle bit may stop toggling as I/O5 + * changes to "1" (ref at49bv642.pdf p9) + */ + status1 = readw(p); + status = readw(p); + if ((status ^ status1) & 0x40) { + printf("Flash write error at address 0x%p: " + "0x%02x != 0x%02x\n", + p, status,word); ret = ERR_PROG_ERROR; + writew(0xf0, base); + readw(base); break; } + + writew(0xf0, base); + readw(base); } if (flags) -- cgit v1.1 From d38da537943cd36356b9d3d9d9b60533554b81d8 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Wed, 23 Jan 2008 17:20:14 +0100 Subject: AVR32: Make SDRAM refresh rate configurable The existing code assumes the SDRAM row refresh period should always be 15.6 us. This is not always true, and indeed on the ATNGW100, the refresh rate should really be 7.81 us. Add a refresh_period member to struct sdram_info and initialize it properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will panic() until the refresh_period member is updated properly. Big thanks to Gerhard Berghofer for pointing out this issue. Signed-off-by: Haavard Skinnemoen --- board/atmel/atngw100/atngw100.c | 3 +++ board/atmel/atstk1000/atstk1000.c | 3 +++ cpu/at32ap/hsdramc.c | 6 +++++- include/asm-avr32/arch-at32ap700x/clk.h | 3 +++ include/asm-avr32/sdram.h | 3 +++ 5 files changed, 17 insertions(+), 1 deletion(-) diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c index bd4b6b4..1ccbe2c 100644 --- a/board/atmel/atngw100/atngw100.c +++ b/board/atmel/atngw100/atngw100.c @@ -23,6 +23,7 @@ #include #include +#include #include #include @@ -40,6 +41,8 @@ static const struct sdram_info sdram = { .trcd = 2, .tras = 5, .txsr = 5, + /* 7.81 us */ + .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, }; int board_early_init_f(void) diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index 6618963..28f64c4 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -23,6 +23,7 @@ #include #include +#include #include #include @@ -40,6 +41,8 @@ static const struct sdram_info sdram = { .trcd = 2, .tras = 5, .txsr = 5, + /* 15.6 us */ + .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, }; int board_early_init_f(void) diff --git a/cpu/at32ap/hsdramc.c b/cpu/at32ap/hsdramc.c index a936e03..1fcfe75 100644 --- a/cpu/at32ap/hsdramc.c +++ b/cpu/at32ap/hsdramc.c @@ -38,6 +38,10 @@ unsigned long sdram_init(const struct sdram_info *info) unsigned long bus_hz; unsigned int i; + if (!info->refresh_period) + panic("ERROR: SDRAM refresh period == 0. " + "Please update the board code\n"); + tmp = (HSDRAMC1_BF(NC, info->col_bits - 8) | HSDRAMC1_BF(NR, info->row_bits - 11) | HSDRAMC1_BF(NB, info->bank_bits - 1) @@ -113,7 +117,7 @@ unsigned long sdram_init(const struct sdram_info *info) * 15.6 us is a typical value for a burst of length one */ bus_hz = get_sdram_clk_rate(); - hsdramc1_writel(TR, (156 * (bus_hz / 1000)) / 10000); + hsdramc1_writel(TR, info->refresh_period); printf("SDRAM: %u MB at address 0x%08lx\n", sdram_size >> 20, info->phys_addr); diff --git a/include/asm-avr32/arch-at32ap700x/clk.h b/include/asm-avr32/arch-at32ap700x/clk.h index ea84c08..385319a 100644 --- a/include/asm-avr32/arch-at32ap700x/clk.h +++ b/include/asm-avr32/arch-at32ap700x/clk.h @@ -75,4 +75,7 @@ static inline unsigned long get_mci_clk_rate(void) } #endif +/* Board code may need the SDRAM base clock as a compile-time constant */ +#define SDRAMC_BUS_HZ (MAIN_CLK_RATE >> CFG_CLKDIV_HSB) + #endif /* __ASM_AVR32_ARCH_CLK_H__ */ diff --git a/include/asm-avr32/sdram.h b/include/asm-avr32/sdram.h index 5057eef..833af6e 100644 --- a/include/asm-avr32/sdram.h +++ b/include/asm-avr32/sdram.h @@ -26,6 +26,9 @@ struct sdram_info { unsigned long phys_addr; unsigned int row_bits, col_bits, bank_bits; unsigned int cas, twr, trc, trp, trcd, tras, txsr; + + /* SDRAM refresh period in cycles */ + unsigned long refresh_period; }; extern unsigned long sdram_init(const struct sdram_info *info); -- cgit v1.1