From da1cd955dfec35b0e15381ad1ee248fa194eed82 Mon Sep 17 00:00:00 2001
From: Dipen Dudhat <dipen.dudhat@freescale.com>
Date: Wed, 2 Sep 2009 11:25:08 +0530
Subject: ppc/85xx: Fix up eSDHC controller clock frequency in the device tree

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 cpu/mpc85xx/fdt.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
index a692529..8366379 100644
--- a/cpu/mpc85xx/fdt.c
+++ b/cpu/mpc85xx/fdt.c
@@ -27,6 +27,9 @@
 #include <libfdt.h>
 #include <fdt_support.h>
 #include <asm/processor.h>
+#ifdef CONFIG_FSL_ESDHC
+#include <fsl_esdhc.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -326,4 +329,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #endif
 
 	ft_fixup_cache(blob);
+
+#if defined(CONFIG_FSL_ESDHC)
+	fdt_fixup_esdhc(blob, bd);
+#endif
 }
-- 
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