From b07b53788a970985363f6daee88e0ead9aff05b7 Mon Sep 17 00:00:00 2001
From: Nitin Garg <nitin.garg@freescale.com>
Date: Fri, 21 Dec 2012 12:33:49 -0600
Subject: ENGR00238048: Add support for processor serial ATAG in uboot for
 iMX53

Add support for Processor UID ATAG in uboot for iMX53. The UID is
present in Fuses bank 0 at offset 0x20.

Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
---
 cpu/arm_cortexa8/mx53/generic.c    | 28 ++++++++++++++++++++++++++++
 include/configs/mx53_smd_android.h |  3 +++
 2 files changed, 31 insertions(+)

diff --git a/cpu/arm_cortexa8/mx53/generic.c b/cpu/arm_cortexa8/mx53/generic.c
index 83dbd4b..ca7e0be 100644
--- a/cpu/arm_cortexa8/mx53/generic.c
+++ b/cpu/arm_cortexa8/mx53/generic.c
@@ -22,6 +22,8 @@
 
 #include <common.h>
 #include <asm/arch/mx53.h>
+#include <asm/imx_iim.h>
+#include <asm/setup.h>
 #include <asm/errno.h>
 #include <asm/io.h>
 #include "crm_regs.h"
@@ -1258,3 +1260,29 @@ int fastboot_check_and_clean_flag(void)
 }
 #endif
 
+#ifdef CONFIG_SERIAL_TAG
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+	int i = 0, tmp = 0;
+	u32 *iim0_unique_id_base =
+		(u32 *)(IIM_BASE_ADDR + IIM_BANK_AREA_0_OFFSET +
+			CONFIG_IIM_UNIQUE_ID_OFFSET);
+
+	serialnr->low = 0;
+	serialnr->high = 0;
+
+	/* Read the 32-63 bits of UID from 4 registers */
+	for (i = 0; i < 4; ++i, ++iim0_unique_id_base) {
+		tmp = readl(iim0_unique_id_base);
+		serialnr->high = serialnr->high << 8;
+		serialnr->high |= (tmp & 0xff);
+	}
+
+	/* Read the 0-31 bits of UID from next 4 registers */
+	for (i = 0; i < 4; ++i, ++iim0_unique_id_base) {
+		tmp = readl(iim0_unique_id_base);
+		serialnr->low = serialnr->low << 8;
+		serialnr->low |= (tmp & 0xff);
+	}
+}
+#endif
diff --git a/include/configs/mx53_smd_android.h b/include/configs/mx53_smd_android.h
index e6ce3ef..9a34a5b 100644
--- a/include/configs/mx53_smd_android.h
+++ b/include/configs/mx53_smd_android.h
@@ -59,10 +59,13 @@
  */
 
 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
+#define CONFIG_SERIAL_TAG		1
 #define CONFIG_REVISION_TAG		1
 #define CONFIG_SETUP_MEMORY_TAGS	1
 #define CONFIG_INITRD_TAG		1
 
+/* IIM Unique ID offset on Bank0 */
+#define CONFIG_IIM_UNIQUE_ID_OFFSET	0x20
 /*
  * Size of malloc() pool
  */
-- 
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