From 1a41f7ce9c086e208c0eabf52565a237af2a2bd1 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 23 Jan 2008 16:31:00 -0600 Subject: 86xx: Rearrange the sequence in start.S * split the BAT initialization so that only 2 BATs (for the boot page and stack) are programmed very early on. The rest are initialized later. * Move other BAT setup, ccsrbar setup, and law setup later in the code after translation has been enabled. These changes will facilitate the moving of law and BAT initialization to C code, and will aid with 36-bit physical addressing support. Signed-off-by: Becky Bruce --- cpu/mpc86xx/start.S | 122 +++++++++++++++++++++++++++++----------------------- 1 file changed, 69 insertions(+), 53 deletions(-) diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index c83310a..ba899f6 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -235,17 +235,8 @@ in_flash: bl enable_ext_addr /* setup the bats */ - bl setup_bats - sync - -#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR) - /* setup ccsrbar */ - bl setup_ccsrbar -#endif + bl early_bats - /* setup the law entries */ - bl law_entry - sync /* * Cache must be enabled here for stack-in-cache trick. * This means we need to enable the BATS. @@ -282,6 +273,19 @@ in_flash: GET_GOT /* initialize GOT access */ + /* setup the rest of the bats */ + bl setup_bats + bl clear_tlbs + sync + +#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR) + /* setup ccsrbar */ + bl setup_ccsrbar +#endif + + bl law_entry + sync + /* run low-level CPU init code (from Flash) */ bl cpu_init_f sync @@ -359,6 +363,7 @@ invalidate_bats: /* setup_bats - set them up to some initial state */ + /* Skip any BATS setup in early_bats */ .globl setup_bats setup_bats: @@ -454,42 +459,6 @@ setup_bats: mtspr DBAT4U, r3 isync - /* IBAT 5 */ - addis r4, r0, CFG_IBAT5L@h - ori r4, r4, CFG_IBAT5L@l - addis r3, r0, CFG_IBAT5U@h - ori r3, r3, CFG_IBAT5U@l - mtspr IBAT5L, r4 - mtspr IBAT5U, r3 - isync - - /* DBAT 5 */ - addis r4, r0, CFG_DBAT5L@h - ori r4, r4, CFG_DBAT5L@l - addis r3, r0, CFG_DBAT5U@h - ori r3, r3, CFG_DBAT5U@l - mtspr DBAT5L, r4 - mtspr DBAT5U, r3 - isync - - /* IBAT 6 */ - addis r4, r0, CFG_IBAT6L@h - ori r4, r4, CFG_IBAT6L@l - addis r3, r0, CFG_IBAT6U@h - ori r3, r3, CFG_IBAT6U@l - mtspr IBAT6L, r4 - mtspr IBAT6U, r3 - isync - - /* DBAT 6 */ - addis r4, r0, CFG_DBAT6L@h - ori r4, r4, CFG_DBAT6L@l - addis r3, r0, CFG_DBAT6U@h - ori r3, r3, CFG_DBAT6U@l - mtspr DBAT6L, r4 - mtspr DBAT6U, r3 - isync - /* IBAT 7 */ addis r4, r0, CFG_IBAT7L@h ori r4, r4, CFG_IBAT7L@l @@ -508,18 +477,65 @@ setup_bats: mtspr DBAT7U, r3 isync -1: - addis r3, 0, 0x0000 - addis r5, 0, 0x4 /* upper bound of 0x00040000 for 7400/750 */ + sync + blr + +/* + * early_bats: + * + * Set up bats needed early on - this is usually the BAT for the + * stack-in-cache and the Flash + */ + .globl early_bats +early_bats: + /* IBAT 5 */ + lis r4, CFG_IBAT5L@h + ori r4, r4, CFG_IBAT5L@l + lis r3, CFG_IBAT5U@h + ori r3, r3, CFG_IBAT5U@l + mtspr IBAT5L, r4 + mtspr IBAT5U, r3 isync + /* DBAT 5 */ + lis r4, CFG_DBAT5L@h + ori r4, r4, CFG_DBAT5L@l + lis r3, CFG_DBAT5U@h + ori r3, r3, CFG_DBAT5U@l + mtspr DBAT5L, r4 + mtspr DBAT5U, r3 + isync + + /* IBAT 6 */ + lis r4, CFG_IBAT6L@h + ori r4, r4, CFG_IBAT6L@l + lis r3, CFG_IBAT6U@h + ori r3, r3, CFG_IBAT6U@l + mtspr IBAT6L, r4 + mtspr IBAT6U, r3 + isync + + /* DBAT 6 */ + lis r4, CFG_DBAT6L@h + ori r4, r4, CFG_DBAT6L@l + lis r3, CFG_DBAT6U@h + ori r3, r3, CFG_DBAT6U@l + mtspr DBAT6L, r4 + mtspr DBAT6U, r3 + isync + blr + + .globl clear_tlbs +clear_tlbs: + addis r3, 0, 0x0000 + addis r5, 0, 0x4 + isync tlblp: - tlbie r3 + tlbie r3 sync - addi r3, r3, 0x1000 - cmp 0, 0, r3, r5 + addi r3, r3, 0x1000 + cmp 0, 0, r3, r5 blt tlblp - blr .globl enable_addr_trans -- cgit v1.1 From 4933b91f8a49e436681f163df3173beb91cac44a Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 23 Jan 2008 16:31:01 -0600 Subject: 86xx: Support new law setup method and convert mpc8641 Adds the support code in cpu/mpc86xx for the new law setup code recently created fsl_law.c, and changes the MPC8641HPCN config to use this code. Signed-off-by: Becky Bruce --- board/freescale/mpc8641hpcn/Makefile | 2 +- board/freescale/mpc8641hpcn/law.c | 64 ++++++++++++++++++++++++++++++++++++ cpu/mpc86xx/cpu_init.c | 7 ++++ cpu/mpc86xx/spd_sdram.c | 16 ++++++++- cpu/mpc86xx/start.S | 2 ++ include/configs/MPC8641HPCN.h | 1 + 6 files changed, 90 insertions(+), 2 deletions(-) create mode 100644 board/freescale/mpc8641hpcn/law.c diff --git a/board/freescale/mpc8641hpcn/Makefile b/board/freescale/mpc8641hpcn/Makefile index 201da3e..e73e7ba 100644 --- a/board/freescale/mpc8641hpcn/Makefile +++ b/board/freescale/mpc8641hpcn/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o +COBJS := $(BOARD).o law.o SOBJS := init.o diff --git a/board/freescale/mpc8641hpcn/law.c b/board/freescale/mpc8641hpcn/law.c new file mode 100644 index 0000000..245f420 --- /dev/null +++ b/board/freescale/mpc8641hpcn/law.c @@ -0,0 +1,64 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +/* + * LAW(Local Access Window) configuration: + * + * 0x0000_0000 0x7fff_ffff DDR 2G + * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M + * 0xa000_0000 0xbfff_ffff PCI2 MEM 512M + * 0xc000_0000 0xdfff_ffff RapidIO 512M + * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M + * 0xe300_0000 0xe3ff_ffff PCI2 IO 16M + * 0xf800_0000 0xf80f_ffff CCSRBAR 1M + * 0xf810_0000 0xf81f_ffff PIXIS 1M + * 0xfe00_0000 0xffff_ffff FLASH (boot bank) 32M + * + * Notes: + * CCSRBAR don't need a configured Local Access Window. + * If flash is 8M at default position (last 8M), no LAW needed. + */ + +struct law_entry law_table[] = { +#if !defined(CONFIG_SPD_EEPROM) + SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), +#endif + SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), + SET_LAW_ENTRY(3, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW_ENTRY(4, PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC), + SET_LAW_ENTRY(5, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), + SET_LAW_ENTRY(6, CFG_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), + SET_LAW_ENTRY(7, (CFG_FLASH_BASE & 0xfe000000), LAW_SIZE_32M, LAW_TRGT_IF_LBC), +#if !defined(CONFIG_SPD_EEPROM) + SET_LAW_ENTRY(8, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), +#endif + SET_LAW_ENTRY(9, CFG_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO) +}; + +int num_law_entries = ARRAY_SIZE(law_table); diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c index 4f8956e..ab5906d 100644 --- a/cpu/mpc86xx/cpu_init.c +++ b/cpu/mpc86xx/cpu_init.c @@ -49,6 +49,10 @@ void cpu_init_f(void) /* Clear initial global data */ memset ((void *) gd, 0, sizeof (gd_t)); +#ifdef CONFIG_FSL_LAW + init_laws(); +#endif + /* Map banks 0 and 1 to the FLASH banks 0 and 1 at preliminary * addresses - these have to be modified later when FLASH size * has been determined @@ -114,5 +118,8 @@ void cpu_init_f(void) */ int cpu_init_r(void) { +#ifdef CONFIG_FSL_LAW + disable_law(0); +#endif return 0; } diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index 54e40f1..bfea4b3 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -27,7 +27,7 @@ #include #include #include - +#include #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) extern void dma_init(void); @@ -1179,12 +1179,16 @@ spd_sdram(void) /* * Set up LAWBAR for DDR 1 space. */ +#ifdef CONFIG_FSL_LAW + set_law(1, CFG_DDR_SDRAM_BASE, law_size_interleaved, LAW_TRGT_IF_DDR_INTRLV); +#else mcm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); mcm->lawar1 = (LAWAR_EN | LAWAR_TRGT_IF_DDR_INTERLEAVED | (LAWAR_SIZE & law_size_interleaved)); debug("DDR: LAWBAR1=0x%08x\n", mcm->lawbar1); debug("DDR: LAWAR1=0x%08x\n", mcm->lawar1); +#endif debug("Interleaved memory size is 0x%08lx\n", memsize_total); #ifdef CONFIG_DDR_INTERLEAVE @@ -1239,12 +1243,16 @@ spd_sdram(void) /* * Set up LAWBAR for DDR 1 space. */ +#ifdef CONFIG_FSL_LAW + set_law(1, CFG_DDR_SDRAM_BASE, law_size_ddr1, LAW_TRGT_IF_DDR_1); +#else mcm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); mcm->lawar1 = (LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & law_size_ddr1)); debug("DDR: LAWBAR1=0x%08x\n", mcm->lawbar1); debug("DDR: LAWAR1=0x%08x\n", mcm->lawar1); +#endif } #if (CONFIG_NUM_DDR_CONTROLLERS > 1) @@ -1269,6 +1277,11 @@ spd_sdram(void) /* * Set up LAWBAR for DDR 2 space. */ +#ifdef CONFIG_FSL_LAW + set_law(8, + (ddr1_enabled ? (memsize_ddr1 * 1024 * 1024) : CFG_DDR_SDRAM_BASE), + law_size_ddr2, LAW_TRGT_IF_DDR_2); +#else if (ddr1_enabled) mcm->lawbar8 = (((memsize_ddr1 * 1024 * 1024) >> 12) & 0xfffff); @@ -1280,6 +1293,7 @@ spd_sdram(void) | (LAWAR_SIZE & law_size_ddr2)); debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8); debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8); +#endif } debug("\nMemory size of DDR2 = 0x%08lx\n", memsize_ddr2); diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index ba899f6..8df27f7 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -283,8 +283,10 @@ in_flash: bl setup_ccsrbar #endif +#ifndef CONFIG_FSL_LAW bl law_entry sync +#endif /* run low-level CPU init code (from Flash) */ bl cpu_init_f diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 985182f..55ed9a6 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -49,6 +49,7 @@ #define CONFIG_PCI1 1 /* PCIE controler 1 (ULI bridge) */ #define CONFIG_PCI2 1 /* PCIE controler 2 (slot) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_FSL_LAW 1 /* Use common FSL law init code */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE -- cgit v1.1 From 031976f6364b93833e989f57e9f1e023e0be8c4c Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 23 Jan 2008 16:31:02 -0600 Subject: 86xx: Convert mpc8610hpcd to new law setup method. Signed-off-by: Becky Bruce --- board/freescale/mpc8610hpcd/Makefile | 2 +- board/freescale/mpc8610hpcd/law.c | 44 ++++++++++++++++++++++++++++++++++++ include/configs/MPC8610HPCD.h | 1 + 3 files changed, 46 insertions(+), 1 deletion(-) create mode 100644 board/freescale/mpc8610hpcd/law.c diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile index 12a92ae..feecf4c 100644 --- a/board/freescale/mpc8610hpcd/Makefile +++ b/board/freescale/mpc8610hpcd/Makefile @@ -29,7 +29,7 @@ LIB = $(obj)lib$(BOARD).a SOBJS := init.o -COBJS := $(BOARD).o +COBJS := $(BOARD).o law.o COBJS-${CONFIG_FSL_DIU_FB} += mpc8610hpcd_diu.o diff --git a/board/freescale/mpc8610hpcd/law.c b/board/freescale/mpc8610hpcd/law.c new file mode 100644 index 0000000..b4d222d --- /dev/null +++ b/board/freescale/mpc8610hpcd/law.c @@ -0,0 +1,44 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +struct law_entry law_table[] = { +#if !defined(CONFIG_SPD_EEPROM) + SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR_1), +#endif + SET_LAW_ENTRY(2, CFG_PCIE1_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1), + SET_LAW_ENTRY(3, CFG_PCIE2_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2), + SET_LAW_ENTRY(4, PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC), + SET_LAW_ENTRY(5, CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1), + SET_LAW_ENTRY(6, CFG_PCIE2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_2), + SET_LAW_ENTRY(7, CFG_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW_ENTRY(8, CFG_PCI1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI_1), + SET_LAW_ENTRY(9, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_1) +}; + +int num_law_entries = ARRAY_SIZE(law_table); diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index a53953c..92b4e7b 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -42,6 +42,7 @@ #define CONFIG_PCIE1 1 /* PCIe 1 connected to ULI bridge */ #define CONFIG_PCIE2 1 /* PCIe 2 connected to slot */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_ENV_OVERWRITE -- cgit v1.1 From 713d8186649dae874613d495b0cecaa039a98b30 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 23 Jan 2008 16:31:03 -0600 Subject: 86xx: Convert sbc8641d to use new law setup code. Signed-off-by: Becky Bruce --- board/sbc8641d/Makefile | 2 +- board/sbc8641d/law.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++ include/configs/sbc8641d.h | 1 + 3 files changed, 60 insertions(+), 1 deletion(-) create mode 100644 board/sbc8641d/law.c diff --git a/board/sbc8641d/Makefile b/board/sbc8641d/Makefile index a90b725..8ecc951 100644 --- a/board/sbc8641d/Makefile +++ b/board/sbc8641d/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o +COBJS := $(BOARD).o law.o SOBJS := init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/sbc8641d/law.c b/board/sbc8641d/law.c new file mode 100644 index 0000000..d403873 --- /dev/null +++ b/board/sbc8641d/law.c @@ -0,0 +1,58 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +/* + * LAW (Local Access Window) configuration: + * + * 0x0000_0000 DDR 256M + * 0x1000_0000 DDR2 256M + * 0x8000_0000 PCI1 MEM 512M + * 0xa000_0000 PCI2 MEM 512M + * 0xc000_0000 RapidIO 512M + * 0xe200_0000 PCI1 IO 16M + * 0xe300_0000 PCI2 IO 16M + * 0xf800_0000 CCSRBAR 2M + * 0xfe00_0000 FLASH (boot bank) 32M + * + */ + + +struct law_entry law_table[] = { + SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), + SET_LAW_ENTRY(3, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW_ENTRY(4, 0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC), + SET_LAW_ENTRY(5, CFG_PCI1_IO_BASE, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), + SET_LAW_ENTRY(6, CFG_PCI2_IO_BASE, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), + SET_LAW_ENTRY(7, 0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC), + SET_LAW_ENTRY(8, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), + SET_LAW_ENTRY(9, CFG_RIO_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_RIO) +}; + +int num_law_entries = ARRAY_SIZE(law_table); diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 54eac38..1c1e826 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -53,6 +53,7 @@ #define CONFIG_PCI1 1 /* PCIE controler 1 (slot 1) */ #define CONFIG_PCI2 1 /* PCIE controler 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE -- cgit v1.1 From 9cd32426f26a0567bb61f339edd83c6a2ce9bfc3 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 23 Jan 2008 16:31:04 -0600 Subject: 86xx: Remove old-style law setup code This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d. Signed-off-by: Becky Bruce --- board/freescale/mpc8610hpcd/Makefile | 2 - board/freescale/mpc8610hpcd/init.S | 147 ------------------------- board/freescale/mpc8610hpcd/u-boot.lds | 1 - board/freescale/mpc8641hpcn/Makefile | 2 - board/freescale/mpc8641hpcn/init.S | 179 ------------------------------ board/freescale/mpc8641hpcn/u-boot.lds | 1 - board/sbc8641d/Makefile | 1 - board/sbc8641d/init.S | 192 --------------------------------- board/sbc8641d/u-boot.lds | 1 - cpu/mpc86xx/spd_sdram.c | 27 ----- cpu/mpc86xx/start.S | 5 - 11 files changed, 558 deletions(-) delete mode 100644 board/freescale/mpc8610hpcd/init.S delete mode 100644 board/freescale/mpc8641hpcn/init.S delete mode 100644 board/sbc8641d/init.S diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile index feecf4c..489689e 100644 --- a/board/freescale/mpc8610hpcd/Makefile +++ b/board/freescale/mpc8610hpcd/Makefile @@ -27,8 +27,6 @@ endif LIB = $(obj)lib$(BOARD).a -SOBJS := init.o - COBJS := $(BOARD).o law.o COBJS-${CONFIG_FSL_DIU_FB} += mpc8610hpcd_diu.o diff --git a/board/freescale/mpc8610hpcd/init.S b/board/freescale/mpc8610hpcd/init.S deleted file mode 100644 index 4d811e1..0000000 --- a/board/freescale/mpc8610hpcd/init.S +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Copyright 2007 Freescale Semiconductor. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * Version 2 as published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include - -#define LAWAR_TRGT_PCI1 0x00000000 -#define LAWAR_TRGT_PCIE1 0x00200000 -#define LAWAR_TRGT_PCIE2 0x00100000 -#define LAWAR_TRGT_LBC 0x00400000 -#define LAWAR_TRGT_DDR 0x00f00000 - -#if !defined(CONFIG_SPD_EEPROM) -#define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff) -#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_DDR | (LAWAR_SIZE & LAWAR_SIZE_512M)) -#else -#define LAWBAR1 0 -#define LAWAR1 ((LAWAR_TRGT_DDR | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN) -#endif - -#define LAWBAR2 ((CFG_PCIE1_MEM_BASE>>12) & 0xffffff) -#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_256M)) - -#define LAWBAR3 ((CFG_PCIE2_MEM_BASE>>12) & 0xffffff) -#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_256M)) - -#define LAWBAR4 ((PIXIS_BASE>>12) & 0xffffff) -#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_LBC | (LAWAR_SIZE & LAWAR_SIZE_2M)) - -#define LAWBAR5 ((CFG_PCIE1_IO_PHYS>>12) & 0xffffff) -#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_1M)) - -#define LAWBAR6 ((CFG_PCIE2_IO_PHYS>>12) & 0xffffff) -#define LAWAR6 (LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_1M)) - -#define LAWBAR7 ((CFG_FLASH_BASE >>12) & 0xffffff) -#define LAWAR7 (LAWAR_EN | LAWAR_TRGT_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M)) - -#define LAWBAR8 ((CFG_PCI1_MEM_PHYS>>12) & 0xffffff) -#define LAWAR8 (LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_256M)) - -#define LAWBAR9 ((CFG_PCI1_IO_PHYS>>12) & 0xffffff) -#define LAWAR9 (LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_1M)) - - - .section .bootpg, "ax" - .globl law_entry -law_entry: - lis r7,CFG_CCSRBAR@h - ori r7,r7,CFG_CCSRBAR@l - - addi r4,r7,0 - addi r5,r7,0 - - /* Skip LAWAR0, start at LAWAR1 */ - lis r6,LAWBAR1@h - ori r6,r6,LAWBAR1@l - stwu r6, 0xc28(r4) - - lis r6,LAWAR1@h - ori r6,r6,LAWAR1@l - stwu r6, 0xc30(r5) - - /* LAWBAR2, LAWAR2 */ - lis r6,LAWBAR2@h - ori r6,r6,LAWBAR2@l - stwu r6, 0x20(r4) - - lis r6,LAWAR2@h - ori r6,r6,LAWAR2@l - stwu r6, 0x20(r5) - - /* LAWBAR3, LAWAR3 */ - lis r6,LAWBAR3@h - ori r6,r6,LAWBAR3@l - stwu r6, 0x20(r4) - - lis r6,LAWAR3@h - ori r6,r6,LAWAR3@l - stwu r6, 0x20(r5) - - /* LAWBAR4, LAWAR4 */ - lis r6,LAWBAR4@h - ori r6,r6,LAWBAR4@l - stwu r6, 0x20(r4) - - lis r6,LAWAR4@h - ori r6,r6,LAWAR4@l - stwu r6, 0x20(r5) - /* LAWBAR5, LAWAR5 */ - lis r6,LAWBAR5@h - ori r6,r6,LAWBAR5@l - stwu r6, 0x20(r4) - - lis r6,LAWAR5@h - ori r6,r6,LAWAR5@l - stwu r6, 0x20(r5) - - /* LAWBAR6, LAWAR6 */ - lis r6,LAWBAR6@h - ori r6,r6,LAWBAR6@l - stwu r6, 0x20(r4) - - lis r6,LAWAR6@h - ori r6,r6,LAWAR6@l - stwu r6, 0x20(r5) - - /* LAWBAR7, LAWAR7 */ - lis r6,LAWBAR7@h - ori r6,r6,LAWBAR7@l - stwu r6, 0x20(r4) - - lis r6,LAWAR7@h - ori r6,r6,LAWAR7@l - stwu r6, 0x20(r5) - - /* LAWBAR8, LAWAR8 */ - lis r6,LAWBAR8@h - ori r6,r6,LAWBAR8@l - stwu r6, 0x20(r4) - - lis r6,LAWAR8@h - ori r6,r6,LAWAR8@l - stwu r6, 0x20(r5) - - /* LAWBAR9, LAWAR9 */ - lis r6,LAWBAR9@h - ori r6,r6,LAWBAR9@l - stwu r6, 0x20(r4) - - lis r6,LAWAR9@h - ori r6,r6,LAWAR9@l - stwu r6, 0x20(r5) - - blr diff --git a/board/freescale/mpc8610hpcd/u-boot.lds b/board/freescale/mpc8610hpcd/u-boot.lds index 37838ec..b88138e 100644 --- a/board/freescale/mpc8610hpcd/u-boot.lds +++ b/board/freescale/mpc8610hpcd/u-boot.lds @@ -51,7 +51,6 @@ SECTIONS .text : { cpu/mpc86xx/start.o (.text) - board/freescale/mpc8610hpcd/init.o (.bootpg) cpu/mpc86xx/traps.o (.text) cpu/mpc86xx/interrupts.o (.text) cpu/mpc86xx/cpu_init.o (.text) diff --git a/board/freescale/mpc8641hpcn/Makefile b/board/freescale/mpc8641hpcn/Makefile index e73e7ba..115df05 100644 --- a/board/freescale/mpc8641hpcn/Makefile +++ b/board/freescale/mpc8641hpcn/Makefile @@ -27,8 +27,6 @@ LIB = $(obj)lib$(BOARD).a COBJS := $(BOARD).o law.o -SOBJS := init.o - SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) diff --git a/board/freescale/mpc8641hpcn/init.S b/board/freescale/mpc8641hpcn/init.S deleted file mode 100644 index cb21ba6..0000000 --- a/board/freescale/mpc8641hpcn/init.S +++ /dev/null @@ -1,179 +0,0 @@ -/* - * Copyright 2004 Freescale Semiconductor. - * Jeff Brown - * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include - -/* - * LAW(Local Access Window) configuration: - * - * 0x0000_0000 0x7fff_ffff DDR 2G - * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M - * 0xa000_0000 0xbfff_ffff PCI2 MEM 512M - * 0xc000_0000 0xdfff_ffff RapidIO 512M - * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M - * 0xe300_0000 0xe3ff_ffff PCI2 IO 16M - * 0xf800_0000 0xf80f_ffff CCSRBAR 1M - * 0xf810_0000 0xf81f_ffff PIXIS 1M - * 0xfe00_0000 0xffff_ffff FLASH (boot bank) 32M - * - * Notes: - * CCSRBAR don't need a configured Local Access Window. - * If flash is 8M at default position (last 8M), no LAW needed. - */ - -#if !defined(CONFIG_SPD_EEPROM) -#define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff) -#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_256M)) -#else -#define LAWBAR1 0 -#define LAWAR1 ((LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN) -#endif - -#define LAWBAR2 ((CFG_PCI1_MEM_BASE>>12) & 0xffffff) -#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M)) - -#define LAWBAR3 ((CFG_PCI2_MEM_BASE>>12) & 0xffffff) -#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) - -/* - * This is not so much the SDRAM map as it is the whole localbus map. - */ -#define LAWBAR4 ((0xf8100000>>12) & 0xffffff) -#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_2M)) - -#define LAWBAR5 ((CFG_PCI1_IO_PHYS>>12) & 0xffffff) -#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)) - -#define LAWBAR6 ((CFG_PCI2_IO_PHYS>>12) & 0xffffff) -#define LAWAR6 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)) - -#define LAWBAR7 ((0xfe000000 >>12) & 0xffffff) -#define LAWAR7 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_32M)) - -#if !defined(CONFIG_SPD_EEPROM) -#define LAWBAR8 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff) -#define LAWAR8 (LAWAR_EN | LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_256M)) -#else -#define LAWBAR8 0 -#define LAWAR8 ((LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN) -#endif - -#define LAWBAR9 ((CFG_RIO_MEM_PHYS>>12) & 0xfffff) -#define LAWAR9 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M)) - - .section .bootpg, "ax" - .globl law_entry -law_entry: - lis r7,CFG_CCSRBAR@h - ori r7,r7,CFG_CCSRBAR@l - - addi r4,r7,0 - addi r5,r7,0 - - /* Skip LAWAR0, start at LAWAR1 */ - lis r6,LAWBAR1@h - ori r6,r6,LAWBAR1@l - stwu r6, 0xc28(r4) - - lis r6,LAWAR1@h - ori r6,r6,LAWAR1@l - stwu r6, 0xc30(r5) - - /* LAWBAR2, LAWAR2 */ - lis r6,LAWBAR2@h - ori r6,r6,LAWBAR2@l - stwu r6, 0x20(r4) - - lis r6,LAWAR2@h - ori r6,r6,LAWAR2@l - stwu r6, 0x20(r5) - - /* LAWBAR3, LAWAR3 */ - lis r6,LAWBAR3@h - ori r6,r6,LAWBAR3@l - stwu r6, 0x20(r4) - - lis r6,LAWAR3@h - ori r6,r6,LAWAR3@l - stwu r6, 0x20(r5) - - /* LAWBAR4, LAWAR4 */ - lis r6,LAWBAR4@h - ori r6,r6,LAWBAR4@l - stwu r6, 0x20(r4) - - lis r6,LAWAR4@h - ori r6,r6,LAWAR4@l - stwu r6, 0x20(r5) - /* LAWBAR5, LAWAR5 */ - lis r6,LAWBAR5@h - ori r6,r6,LAWBAR5@l - stwu r6, 0x20(r4) - - lis r6,LAWAR5@h - ori r6,r6,LAWAR5@l - stwu r6, 0x20(r5) - - /* LAWBAR6, LAWAR6 */ - lis r6,LAWBAR6@h - ori r6,r6,LAWBAR6@l - stwu r6, 0x20(r4) - - lis r6,LAWAR6@h - ori r6,r6,LAWAR6@l - stwu r6, 0x20(r5) - - /* LAWBAR7, LAWAR7 */ - lis r6,LAWBAR7@h - ori r6,r6,LAWBAR7@l - stwu r6, 0x20(r4) - - lis r6,LAWAR7@h - ori r6,r6,LAWAR7@l - stwu r6, 0x20(r5) - - /* LAWBAR8, LAWAR8 */ - lis r6,LAWBAR8@h - ori r6,r6,LAWBAR8@l - stwu r6, 0x20(r4) - - lis r6,LAWAR8@h - ori r6,r6,LAWAR8@l - stwu r6, 0x20(r5) - - /* LAWBAR9, LAWAR9 */ - lis r6,LAWBAR9@h - ori r6,r6,LAWBAR9@l - stwu r6, 0x20(r4) - - lis r6,LAWAR9@h - ori r6,r6,LAWAR9@l - stwu r6, 0x20(r5) - - blr diff --git a/board/freescale/mpc8641hpcn/u-boot.lds b/board/freescale/mpc8641hpcn/u-boot.lds index 9900670..06d491b 100644 --- a/board/freescale/mpc8641hpcn/u-boot.lds +++ b/board/freescale/mpc8641hpcn/u-boot.lds @@ -51,7 +51,6 @@ SECTIONS .text : { cpu/mpc86xx/start.o (.text) - board/freescale/mpc8641hpcn/init.o (.bootpg) cpu/mpc86xx/traps.o (.text) cpu/mpc86xx/interrupts.o (.text) cpu/mpc86xx/cpu_init.o (.text) diff --git a/board/sbc8641d/Makefile b/board/sbc8641d/Makefile index 8ecc951..115df05 100644 --- a/board/sbc8641d/Makefile +++ b/board/sbc8641d/Makefile @@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a COBJS := $(BOARD).o law.o -SOBJS := init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/sbc8641d/init.S b/board/sbc8641d/init.S deleted file mode 100644 index c151d7e..0000000 --- a/board/sbc8641d/init.S +++ /dev/null @@ -1,192 +0,0 @@ -/* - * Copyright 2007 Wind River Systemes, Inc. - * Copyright 2007 Embedded Specialties, Inc. - * Joe Hamman joe.hamman@embeddedspecialties.com - * - * Copyright 2004 Freescale Semiconductor. - * Jeff Brown - * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include - -/* - * LAW(Local Access Window) configuration: - * - * 0x0000_0000 0x0fff_ffff DDR1 256M - * 0x1000_0000 0x1fff_ffff DDR2 256M - * 0xe000_0000 0xffff_ffff LBC 512M - * - * Notes: - * CCSRBAR doesn't need a configured Local Access Window. - * If flash is 8M at default position (last 8M), no LAW needed. - */ - -# DDR Bank 1 -# #define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff) -# #define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_256M)) - -# DDR Bank 2 -# #define LAWBAR2 ((CFG_DDR_SDRAM_BASE2>>12) & 0xffffff) -# #define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_256M)) - -# LBC -# #define LAWBAR3 ((0xe0000000>>12) & 0xffffff) -# #define LAWAR3 (LAWAR_EN & (LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_512M))) - -/* - * LAW (Local Access Window) configuration: - * - * 0x0000_0000 DDR 256M - * 0x1000_0000 DDR2 256M - * 0x8000_0000 PCI1 MEM 512M - * 0xa000_0000 PCI2 MEM 512M - * 0xc000_0000 RapidIO 512M - * 0xe200_0000 PCI1 IO 16M - * 0xe300_0000 PCI2 IO 16M - * 0xf800_0000 CCSRBAR 2M - * 0xfe00_0000 FLASH (boot bank) 32M - * - */ - -#define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff) -#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_256M)) - -#define LAWBAR2 ((CFG_PCI1_MEM_BASE>>12) & 0xffffff) -#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M)) - -#define LAWBAR3 ((CFG_PCI2_MEM_BASE>>12) & 0xffffff) -#define LAWAR3 (~LAWAR_EN & (LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M))) - -#define LAWBAR4 ((0xf8000000>>12) & 0xffffff) -#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_2M)) - -#define LAWBAR5 ((CFG_PCI1_IO_BASE>>12) & 0xffffff) -#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)) - -#define LAWBAR6 ((CFG_PCI2_IO_BASE>>12) & 0xffffff) -#define LAWAR6 (~LAWAR_EN &( LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M))) - -#define LAWBAR7 ((0xfe000000 >>12) & 0xffffff) -#define LAWAR7 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_32M)) - -#define LAWBAR8 ((CFG_DDR_SDRAM_BASE2>>12) & 0xffffff) -#define LAWAR8 (LAWAR_EN | LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_256M)) - -#define LAWBAR9 ((CFG_RIO_MEM_BASE>>12) & 0xfffff) -#define LAWAR9 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M)) - - .section .bootpg, "ax" - .globl law_entry -law_entry: - lis r7,CFG_CCSRBAR@h - ori r7,r7,CFG_CCSRBAR@l - - addi r4,r7,0 - addi r5,r7,0 - - /* Skip LAWAR0, start at LAWAR1 */ - lis r6,LAWBAR1@h - ori r6,r6,LAWBAR1@l - stwu r6, 0xc28(r4) - - lis r6,LAWAR1@h - ori r6,r6,LAWAR1@l - stwu r6, 0xc30(r5) - - /* LAWBAR2, LAWAR2 */ - lis r6,LAWBAR2@h - ori r6,r6,LAWBAR2@l - stwu r6, 0x20(r4) - - lis r6,LAWAR2@h - ori r6,r6,LAWAR2@l - stwu r6, 0x20(r5) - - /* LAWBAR3, LAWAR3 */ - lis r6,LAWBAR3@h - ori r6,r6,LAWBAR3@l - stwu r6, 0x20(r4) - - lis r6,LAWAR3@h - ori r6,r6,LAWAR3@l - stwu r6, 0x20(r5) - - /* LAWBAR4, LAWAR4 */ - lis r6,LAWBAR4@h - ori r6,r6,LAWBAR4@l - stwu r6, 0x20(r4) - - lis r6,LAWAR4@h - ori r6,r6,LAWAR4@l - stwu r6, 0x20(r5) - - /* LAWBAR5, LAWAR5 */ - lis r6,LAWBAR5@h - ori r6,r6,LAWBAR5@l - stwu r6, 0x20(r4) - - lis r6,LAWAR5@h - ori r6,r6,LAWAR5@l - stwu r6, 0x20(r5) - - /* LAWBAR6, LAWAR6 */ - lis r6,LAWBAR6@h - ori r6,r6,LAWBAR6@l - stwu r6, 0x20(r4) - - lis r6,LAWAR6@h - ori r6,r6,LAWAR6@l - stwu r6, 0x20(r5) - - /* LAWBAR7, LAWAR7 */ - lis r6,LAWBAR7@h - ori r6,r6,LAWBAR7@l - stwu r6, 0x20(r4) - - lis r6,LAWAR7@h - ori r6,r6,LAWAR7@l - stwu r6, 0x20(r5) - - /* LAWBAR8, LAWAR8 */ - lis r6,LAWBAR8@h - ori r6,r6,LAWBAR8@l - stwu r6, 0x20(r4) - - lis r6,LAWAR8@h - ori r6,r6,LAWAR8@l - stwu r6, 0x20(r5) - - /* LAWBAR9, LAWAR9 */ - lis r6,LAWBAR9@h - ori r6,r6,LAWBAR9@l - stwu r6, 0x20(r4) - - lis r6,LAWAR9@h - ori r6,r6,LAWAR9@l - stwu r6, 0x20(r5) - - blr diff --git a/board/sbc8641d/u-boot.lds b/board/sbc8641d/u-boot.lds index 5de9b78..be362ee 100644 --- a/board/sbc8641d/u-boot.lds +++ b/board/sbc8641d/u-boot.lds @@ -51,7 +51,6 @@ SECTIONS .text : { cpu/mpc86xx/start.o (.text) - board/sbc8641d/init.o (.bootpg) cpu/mpc86xx/traps.o (.text) cpu/mpc86xx/interrupts.o (.text) cpu/mpc86xx/cpu_init.o (.text) diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index bfea4b3..e501caf 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -1123,7 +1123,6 @@ spd_sdram(void) int memsize_ddr1 = 0; unsigned int law_size_ddr1; volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; #ifdef CONFIG_DDR_INTERLEAVE volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1; #endif @@ -1181,13 +1180,6 @@ spd_sdram(void) */ #ifdef CONFIG_FSL_LAW set_law(1, CFG_DDR_SDRAM_BASE, law_size_interleaved, LAW_TRGT_IF_DDR_INTRLV); -#else - mcm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - mcm->lawar1 = (LAWAR_EN - | LAWAR_TRGT_IF_DDR_INTERLEAVED - | (LAWAR_SIZE & law_size_interleaved)); - debug("DDR: LAWBAR1=0x%08x\n", mcm->lawbar1); - debug("DDR: LAWAR1=0x%08x\n", mcm->lawar1); #endif debug("Interleaved memory size is 0x%08lx\n", memsize_total); @@ -1245,13 +1237,6 @@ spd_sdram(void) */ #ifdef CONFIG_FSL_LAW set_law(1, CFG_DDR_SDRAM_BASE, law_size_ddr1, LAW_TRGT_IF_DDR_1); -#else - mcm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - mcm->lawar1 = (LAWAR_EN - | LAWAR_TRGT_IF_DDR1 - | (LAWAR_SIZE & law_size_ddr1)); - debug("DDR: LAWBAR1=0x%08x\n", mcm->lawbar1); - debug("DDR: LAWAR1=0x%08x\n", mcm->lawar1); #endif } @@ -1281,18 +1266,6 @@ spd_sdram(void) set_law(8, (ddr1_enabled ? (memsize_ddr1 * 1024 * 1024) : CFG_DDR_SDRAM_BASE), law_size_ddr2, LAW_TRGT_IF_DDR_2); -#else - if (ddr1_enabled) - mcm->lawbar8 = (((memsize_ddr1 * 1024 * 1024) >> 12) - & 0xfffff); - else - mcm->lawbar8 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - - mcm->lawar8 = (LAWAR_EN - | LAWAR_TRGT_IF_DDR2 - | (LAWAR_SIZE & law_size_ddr2)); - debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8); - debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8); #endif } diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index 8df27f7..f163521 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -283,11 +283,6 @@ in_flash: bl setup_ccsrbar #endif -#ifndef CONFIG_FSL_LAW - bl law_entry - sync -#endif - /* run low-level CPU init code (from Flash) */ bl cpu_init_f sync -- cgit v1.1 From ddcebcb638715a6278da93b553d5016f99823816 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 23 Jan 2008 16:31:05 -0600 Subject: 86xx: Add print_laws function to fsl_law.c This can be used for debug, and will be used by board code to help implement reginfo. Signed-off-by: Becky Bruce --- drivers/misc/fsl_law.c | 19 +++++++++++++++++++ include/asm-ppc/fsl_law.h | 1 + 2 files changed, 20 insertions(+) diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c index 8bdf5a7..dca6a4d 100644 --- a/drivers/misc/fsl_law.c +++ b/drivers/misc/fsl_law.c @@ -28,6 +28,7 @@ #include #define LAWAR_EN 0x80000000 +#define FSL_HW_NUM_LAWS 10 /* number of LAWs in the hw implementation */ void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id) { @@ -53,6 +54,24 @@ void disable_law(u8 idx) return; } +void print_laws(void) +{ + volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08); + volatile u32 *lawbar = base; + volatile u32 *lawar = base + 2; + int i; + + printf("\nLocal Access Window Configuration\n"); + for(i = 0; i < FSL_HW_NUM_LAWS; i++) { + printf("\tLAWBAR%d : 0x%08x, LAWAR%d : 0x%08x\n", + i, in_be32(lawbar), i, in_be32(lawar)); + lawbar += 8; + lawar += 8; + } + + return; +} + void init_laws(void) { int i; diff --git a/include/asm-ppc/fsl_law.h b/include/asm-ppc/fsl_law.h index 7cb8840..23bd505 100644 --- a/include/asm-ppc/fsl_law.h +++ b/include/asm-ppc/fsl_law.h @@ -73,6 +73,7 @@ struct law_entry { extern void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id); extern void disable_law(u8 idx); extern void init_laws(void); +extern void print_laws(void); /* define in board code */ extern struct law_entry law_table[]; -- cgit v1.1 From 4f93f8b1a4d35b6d302842132edba920ef8f62aa Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 23 Jan 2008 16:31:06 -0600 Subject: 86xx: Add reginfo command Signed-off-by: Becky Bruce --- common/cmd_reginfo.c | 10 ++++++++-- cpu/mpc86xx/cpu.c | 24 +++++++++++++++++++++++- include/configs/MPC8610HPCD.h | 1 + include/configs/MPC8641HPCN.h | 1 + include/configs/sbc8641d.h | 1 + 5 files changed, 34 insertions(+), 3 deletions(-) diff --git a/common/cmd_reginfo.c b/common/cmd_reginfo.c index bb6aa30..11af22b 100644 --- a/common/cmd_reginfo.c +++ b/common/cmd_reginfo.c @@ -31,6 +31,8 @@ #include #elif defined (CONFIG_MPC5200) #include +#elif defined (CONFIG_MPC86xx) +extern void mpc86xx_reginfo(void); #endif int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) @@ -329,14 +331,18 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) *(volatile ulong*)MPC5XXX_SDRAM_CS0CFG); printf ("\tSDRAMCS1: %08X\n", *(volatile ulong*)MPC5XXX_SDRAM_CS1CFG); -#endif /* CONFIG_MPC5200 */ +#elif defined(CONFIG_MPC86xx) + mpc86xx_reginfo(); +#endif /* CONFIG_MPC86xx */ + return 0; } /**************************************************/ #if ( defined(CONFIG_8xx) || defined(CONFIG_405GP) || \ - defined(CONFIG_405EP) || defined(CONFIG_MPC5200) ) && \ + defined(CONFIG_405EP) || defined(CONFIG_MPC5200) || \ + defined(CONFIG_MPC86xx)) && \ defined(CONFIG_CMD_REGINFO) U_BOOT_CMD( diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index 11354d3..e1b3c52 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -27,6 +27,7 @@ #include #include #include +#include #if defined(CONFIG_OF_FLAT_TREE) #include @@ -324,6 +325,27 @@ ft_cpu_setup(void *blob, bd_t *bd) if (p != NULL) memcpy(p, bd->bi_enet3addr, 6); #endif +#endif /* CONFIG_OF_FLAT_TREE */ + +/* + * Print out the state of various machine registers. + * Currently prints out LAWs and BR0/OR0 + */ +void mpc86xx_reginfo(void) +{ + immap_t *immap = (immap_t *)CFG_IMMR; + ccsr_lbc_t *lbc = &immap->im_lbc; + + print_laws(); + + printf ("Local Bus Controller Registers\n" + "\tBR0\t0x%08X\tOR0\t0x%08X \n", in_be32(&lbc->br0), in_be32(&lbc->or0)); + printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", in_be32(&lbc->br1), in_be32(&lbc->or1)); + printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", in_be32(&lbc->br2), in_be32(&lbc->or2)); + printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", in_be32(&lbc->br3), in_be32(&lbc->or3)); + printf("\tBR4\t0x%08X\tOR4\t0x%08X \n", in_be32(&lbc->br4), in_be32(&lbc->or4)); + printf("\tBR5\t0x%08X\tOR5\t0x%08X \n", in_be32(&lbc->br5), in_be32(&lbc->or5)); + printf("\tBR6\t0x%08X\tOR6\t0x%08X \n", in_be32(&lbc->br6), in_be32(&lbc->or6)); + printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", in_be32(&lbc->br7), in_be32(&lbc->or7)); } -#endif diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 92b4e7b..3920147 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -315,6 +315,7 @@ #define CONFIG_NET_MULTI #define CONFIG_CMD_NET #define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_CMD_REGINFO #define CONFIG_ULI526X #ifdef CONFIG_ULI526X diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 55ed9a6..a8d0077 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -537,6 +537,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CMD_PING #define CONFIG_CMD_I2C +#define CONFIG_CMD_REGINFO #if defined(CFG_RAMBOOT) #undef CONFIG_CMD_ENV diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 1c1e826..1991a8c 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -480,6 +480,7 @@ #include #define CONFIG_CMD_PING #define CONFIG_CMD_I2C + #define CONFIG_CMD_REGINFO #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -- cgit v1.1 From ccd6e1464e5396bc1a9aebf7077ddf4342eafe03 Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Tue, 12 Feb 2008 14:53:28 -0600 Subject: Add CFG_MPC86xx_DDR_ADDR and CFG_MPC86xx_DDR2_ADDR symbols These replace direct structure references for IMMR sections. Signed-off-by: Jon Loeliger --- include/asm-ppc/immap_86xx.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h index 169725b..a15c6ec 100644 --- a/include/asm-ppc/immap_86xx.h +++ b/include/asm-ppc/immap_86xx.h @@ -1330,4 +1330,9 @@ typedef struct immap { extern immap_t *immr; +#define CFG_MPC86xx_DDR_OFFSET (0x2000) +#define CFG_MPC86xx_DDR_ADDR (CFG_IMMR + CFG_MPC86xx_DDR_OFFSET) +#define CFG_MPC86xx_DDR2_OFFSET (0x6000) +#define CFG_MPC86xx_DDR2_ADDR (CFG_IMMR + CFG_MPC86xx_DDR2_OFFSET) + #endif /*__IMMAP_86xx__*/ -- cgit v1.1 From 3f2ac8f928c76cbd2374437b2d079f8b4324aaba Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Wed, 23 Jan 2008 15:55:02 -0600 Subject: 86xx: Fix compilation warning in sys_eprom.c sys_eeprom.c:82:9: warning: unknown escape sequence '\/' Signed-off-by: Jon Loeliger --- board/freescale/common/sys_eeprom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 44c0978..c8e17d0 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -79,7 +79,7 @@ int mac_show(void) /* Show Build Date, * BCD date values, as YYMMDDhhmmss. */ - printf("Date 20%02x\/%02x\/%02x %02x:%02x:%02x\n", + printf("Date 20%02x/%02x/%02x %02x:%02x:%02x\n", mac_data.date[0], mac_data.date[1], mac_data.date[2], -- cgit v1.1