From 9df58728921b6ef640724c7cf78ac9e94af36008 Mon Sep 17 00:00:00 2001 From: Jose Miguel Sanchez Sanabria Date: Mon, 15 Jan 2018 17:04:45 +0100 Subject: Added support for I2C bus 0 1 2, and PMIC PF0100 --- board/isee/igep0046/Makefile | 1 + board/isee/igep0046/igep0046.c | 98 +++++++++++++++++++++++++++++++++++++++--- board/isee/igep0046/pfuze.c | 92 +++++++++++++++++++++++++++++++++++++++ board/isee/igep0046/pfuze.h | 13 ++++++ include/configs/igep0046.h | 17 ++++++++ 5 files changed, 216 insertions(+), 5 deletions(-) create mode 100644 board/isee/igep0046/pfuze.c create mode 100644 board/isee/igep0046/pfuze.h diff --git a/board/isee/igep0046/Makefile b/board/isee/igep0046/Makefile index ff2f3c7..cc50bc4 100644 --- a/board/isee/igep0046/Makefile +++ b/board/isee/igep0046/Makefile @@ -6,4 +6,5 @@ # SPDX-License-Identifier: GPL-2.0+ # +obj-$(CONFIG_POWER_PFUZE100) += pfuze.o obj-y += igep0046.o diff --git a/board/isee/igep0046/igep0046.c b/board/isee/igep0046/igep0046.c index ea0fb4a..9e01afa 100644 --- a/board/isee/igep0046/igep0046.c +++ b/board/isee/igep0046/igep0046.c @@ -8,21 +8,28 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include #include -#include -#include -#include -#include #include -#include #include #include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pfuze.h" DECLARE_GLOBAL_DATA_PTR; + +/* MUX defines */ #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) @@ -35,6 +42,15 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ PAD_CTL_SRE_FAST ) +#ifdef CONFIG_SYS_I2C +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define I2C_PMIC 1 +#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL) +#endif + int dram_init(void) { gd->ram_size = imx_ddr_size(); @@ -62,6 +78,41 @@ static iomux_v3_cfg_t const init_pads[] = MX6_PAD_DI0_PIN15__GPIO4_IO17 | MUX_PAD_CTRL(GPIO_LED_PAD_CTRL), }; + +#ifdef CONFIG_SYS_I2C +static struct i2c_pads_info i2c_pad_info1 = +{ + .scl = + { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = + { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +static struct i2c_pads_info i2c_pad_info2 = +{ + .scl = + { + .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | I2C_PAD, + .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | I2C_PAD, + .gp = IMX_GPIO_NR(3, 17) + }, + .sda = + { + .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | I2C_PAD, + .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | I2C_PAD, + .gp = IMX_GPIO_NR(3, 18) + } +}; +#endif + static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); @@ -69,6 +120,7 @@ static void setup_iomux_uart(void) int checkboard(void) { + puts("Module: IGEP0046\n"); return 0; } @@ -91,6 +143,11 @@ int board_early_init_f(void) int board_init(void) { + +#ifdef CONFIG_SYS_I2C + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); +#endif return 0; } @@ -100,3 +157,34 @@ int board_late_init(void) checkboard(); return 0; } + +#ifdef CONFIG_POWER +int power_init_board(void) +{ +#ifdef CONFIG_SYS_I2C + struct pmic *p; + unsigned int reg, ret; + + p = pfuze_common_init(I2C_PMIC); + if (!p) + return -ENODEV; + + ret = pfuze_mode_init(p, APS_PFM); + if (ret < 0) + return ret; + + /* Increase VGEN5 from 2.8 to 3V */ + pmic_reg_read(p, PFUZE100_VGEN5VOL, ®); + reg &= ~LDO_VOL_MASK; + reg |= LDOB_3_00V; + pmic_reg_write(p, PFUZE100_VGEN5VOL, reg); + + /* Decrease VGEN6 from 3.3 to 2.5V */ + pmic_reg_read(p, PFUZE100_VGEN6VOL, ®); + reg &= ~LDO_VOL_MASK; + reg |= LDOB_2_50V; + pmic_reg_write(p, PFUZE100_VGEN6VOL, reg); +#endif + return 0; +} +#endif diff --git a/board/isee/igep0046/pfuze.c b/board/isee/igep0046/pfuze.c new file mode 100644 index 0000000..d6a209e --- /dev/null +++ b/board/isee/igep0046/pfuze.c @@ -0,0 +1,92 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +int pfuze_mode_init(struct pmic *p, u32 mode) +{ + unsigned char offset, i, switch_num; + u32 id, ret; + + pmic_reg_read(p, PFUZE100_DEVICEID, &id); + id = id & 0xf; + + if (id == 0) { + switch_num = 6; + offset = PFUZE100_SW1CMODE; + } else if (id == 1) { + switch_num = 4; + offset = PFUZE100_SW2MODE; + } else { + printf("Not supported, id=%d\n", id); + return -EINVAL; + } + + ret = pmic_reg_write(p, PFUZE100_SW1ABMODE, mode); + if (ret < 0) { + printf("Set SW1AB mode error!\n"); + return ret; + } + + for (i = 0; i < switch_num - 1; i++) { + ret = pmic_reg_write(p, offset + i * SWITCH_SIZE, mode); + if (ret < 0) { + printf("Set switch 0x%x mode error!\n", + offset + i * SWITCH_SIZE); + return ret; + } + } + + return ret; +} + +struct pmic *pfuze_common_init(unsigned char i2cbus) +{ + struct pmic *p; + int ret; + unsigned int reg; + + ret = power_pfuze100_init(i2cbus); + if (ret) + return NULL; + + p = pmic_get("PFUZE100"); + ret = pmic_probe(p); + if (ret) + return NULL; + + pmic_reg_read(p, PFUZE100_DEVICEID, ®); + printf("PMIC: PFUZE100 ID=0x%02x\n", reg); + + /* Set SW1AB stanby volage to 0.975V */ + pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®); + reg &= ~SW1x_STBY_MASK; + reg |= SW1x_0_975V; + pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg); + + /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ + pmic_reg_read(p, PFUZE100_SW1ABCONF, ®); + reg &= ~SW1xCONF_DVSSPEED_MASK; + reg |= SW1xCONF_DVSSPEED_4US; + pmic_reg_write(p, PFUZE100_SW1ABCONF, reg); + + /* Set SW1C standby voltage to 0.975V */ + pmic_reg_read(p, PFUZE100_SW1CSTBY, ®); + reg &= ~SW1x_STBY_MASK; + reg |= SW1x_0_975V; + pmic_reg_write(p, PFUZE100_SW1CSTBY, reg); + + /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */ + pmic_reg_read(p, PFUZE100_SW1CCONF, ®); + reg &= ~SW1xCONF_DVSSPEED_MASK; + reg |= SW1xCONF_DVSSPEED_4US; + pmic_reg_write(p, PFUZE100_SW1CCONF, reg); + + return p; +} diff --git a/board/isee/igep0046/pfuze.h b/board/isee/igep0046/pfuze.h new file mode 100644 index 0000000..53cfc99 --- /dev/null +++ b/board/isee/igep0046/pfuze.h @@ -0,0 +1,13 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __PFUZE_BOARD_HELPER__ +#define __PFUZE_BOARD_HELPER__ + +struct pmic *pfuze_common_init(unsigned char i2cbus); +int pfuze_mode_init(struct pmic *p, u32 mode); + +#endif diff --git a/include/configs/igep0046.h b/include/configs/igep0046.h index 0e648de..9154a6d 100644 --- a/include/configs/igep0046.h +++ b/include/configs/igep0046.h @@ -50,6 +50,7 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +/* Miscellaneous configurable options */ #define CONFIG_AUTOBOOT_KEYED #define CONFIG_AUTOBOOT_PROMPT "Press ESC to abort autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_STOP_STR "\x1b" @@ -60,6 +61,22 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_STACKSIZE (128 * 1024) +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +#define CONFIG_SYS_I2C_SPEED 100000 + + +/* PMIC Configs */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 + /* MMC Configs */ #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC -- cgit v1.1