From 9b6e9d1c13e2a1ed8b508eecaaf4ed462a82cfd6 Mon Sep 17 00:00:00 2001 From: Jiang Yutang Date: Thu, 24 Feb 2011 16:11:56 +0800 Subject: powerpc/85xx: Enable eSPI support on P1022DS Signed-off-by: Jiang Yutang Signed-off-by: Kumar Gala --- board/freescale/p1022ds/p1022ds.c | 3 +++ include/configs/P1022DS.h | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index 73a1021..8ef627f 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -46,6 +46,9 @@ int board_early_init_f(void) /* Set the pin muxing to enable ETSEC2. */ clrbits_be32(&gur->pmuxcr2, 0x001F8000); + /* Enable the SPI */ + clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI); + return 0; } diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index fb2a41c..593efd5 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -170,6 +170,8 @@ #define PIXIS_LBMAP_SWITCH 7 #define PIXIS_LBMAP_MASK 0xF0 #define PIXIS_LBMAP_ALTBANK 0x20 +#define PIXIS_ELBC_SPI_MASK 0xc0 +#define PIXIS_SPI 0x80 #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ @@ -267,6 +269,19 @@ #define CONFIG_SYS_EEPROM_BUS_NUM 1 /* + * eSPI - Enhanced SPI + */ +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SPANSION + +#define CONFIG_HARD_SPI +#define CONFIG_FSL_ESPI + +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED 10000000 +#define CONFIG_SF_DEFAULT_MODE 0 + +/* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ -- cgit v1.1