From 8dfdf83abaff44efb487f801cd1757a729d427c5 Mon Sep 17 00:00:00 2001 From: Ye Li Date: Thu, 17 Nov 2016 16:54:56 +0800 Subject: MLK-13450-15 ehci-mx6: Add powerup_fixup implementation When doing port reset, the PR bit of PORTSC1 will be automatically cleared by our IP, but standard EHCI needs explicit clear by software. The EHCI-HCD driver follow the EHCI specification, so after 50ms wait, it clear the PR bit by writting to the PORTSC1 register with value loaded before setting PR. This sequence is ok for our IP when the delay time is exact. But when the timer is slower, some bits like PE, PSPD have been set by controller automatically after the PR is automatically cleared. So the writing to the PORTSC1 will overwrite these bits set by controller. And eventually the driver gets wrong status. We implement the powerup_fixup operation which delays 50ms and will check the PR until it is cleared by controller. And will update the reg value which is written to PORTSC register by EHCI-HCD driver. This is much safer than depending on the delay time to be accurate and aligining with controller's behaiver. Signed-off-by: Ye Li --- drivers/usb/host/ehci-mx6.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index acd68fe..367b0ae 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -257,6 +257,29 @@ int usb_phy_mode(int port) } #endif +static void ehci_mx6_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg, + uint32_t *reg) +{ + uint32_t result; + int usec = 2000; + + mdelay(50); + + do { + result = ehci_readl(status_reg); + udelay(5); + if (!(result & EHCI_PS_PR)) + break; + usec--; + } while (usec > 0); + + *reg = ehci_readl(status_reg); +} + +static const struct ehci_ops mx6_ehci_ops = { + .powerup_fixup = ehci_mx6_powerup_fixup, +}; + static void usb_oc_config(int index) { #if defined(CONFIG_MX6) @@ -355,6 +378,8 @@ int ehci_hcd_init(int index, enum usb_init_type init, enable_usboh3_clk(1); mdelay(1); + ehci_set_controller_priv(index, NULL, &mx6_ehci_ops); + /* Do board specific initialization */ board_ehci_hcd_init(index); -- cgit v1.1