From 85b8856fc4892422e5b2a8e6b3f6bb6acd179b30 Mon Sep 17 00:00:00 2001 From: Nitin Garg Date: Tue, 31 Mar 2015 20:37:36 -0500 Subject: MLK-10524: iMX6x: Implement workaround for Cortex-A9 errata 845369 Under very rare timing circumstances, transitioning into streaming mode might create a data corruption. Present on Two or more processors or 1 core with ACP, all revisions. This erratum can be worked round by setting bit[22] of the undocumented Diagnostic Control Register to 1. Signed-off-by: Nitin Garg (cherry picked from commit 70ad44e523680de67dd8b7a7505d7f27799980ee) --- README | 1 + arch/arm/cpu/armv7/start.S | 5 +++++ include/configs/mx6_common.h | 1 + 3 files changed, 7 insertions(+) diff --git a/README b/README index f206d1d..c98af2e 100644 --- a/README +++ b/README @@ -491,6 +491,7 @@ The following options need to be configured: CONFIG_ARM_ERRATA_751472 CONFIG_ARM_ERRATA_794072 CONFIG_ARM_ERRATA_761320 + CONFIG_ARM_ERRATA_845369 If set, the workarounds for these ARM errata are applied early during U-Boot startup. Note that these options force the diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index ea85bf8..e23eb69 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -337,6 +337,11 @@ ENTRY(cpu_init_cp15) orr r0, r0, #1 << 21 @ set bit #21 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register #endif +#ifdef CONFIG_ARM_ERRATA_845369 + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register + orr r0, r0, #1 << 22 @ set bit #22 + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register +#endif mov pc, lr @ back to my caller ENDPROC(cpu_init_cp15) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index c7dfa5f..064fe39 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -21,6 +21,7 @@ #define CONFIG_ARM_ERRATA_751472 #define CONFIG_ARM_ERRATA_794072 #define CONFIG_ARM_ERRATA_761320 +#define CONFIG_ARM_ERRATA_845369 #define CONFIG_LDO_BYPASS_CHECK #endif -- cgit v1.1