From 820cfb872d92ac7c3ccf0eca351f6761ef86684f Mon Sep 17 00:00:00 2001 From: Lily Zhang Date: Thu, 21 Jul 2011 16:52:46 +0800 Subject: ENGR00151695 mx53 ddr3: update ESDREF and MR0 Updated mx53 ddr3 script according to MX53_TO2_DDR3_LCB_SMD_ARDb_v1.inc from Michael J Kjar on July 8, 2011: -change ESDREF[REF_SEL]=01 (for 32KHz), from incorrect setting of 00 (64KHz) -change DDR3 MR0 write to "setmem /32 0x63fd901c = 0x052080b0" from "0x092080b0". This chagned write recovery from 8 clocks to 6 clocks (in line with ESDCFG1[tWR]) Signed-off-by: Lily Zhang --- board/freescale/mx53_ard/flash_header.S | 6 +++--- board/freescale/mx53_loco/flash_header.S | 6 +++--- board/freescale/mx53_smd/flash_header.S | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/board/freescale/mx53_ard/flash_header.S b/board/freescale/mx53_ard/flash_header.S index d7130c1..94348bb 100644 --- a/board/freescale/mx53_ard/flash_header.S +++ b/board/freescale/mx53_ard/flash_header.S @@ -169,14 +169,14 @@ MXC_DCD_ITEM(37, ESDCTL_BASE_ADDR + 0x004, 0x0002002d) MXC_DCD_ITEM(38, ESDCTL_BASE_ADDR + 0x01c, 0x00008032) MXC_DCD_ITEM(39, ESDCTL_BASE_ADDR + 0x01c, 0x00008033) MXC_DCD_ITEM(40, ESDCTL_BASE_ADDR + 0x01c, 0x00028031) -MXC_DCD_ITEM(41, ESDCTL_BASE_ADDR + 0x01c, 0x092080b0) +MXC_DCD_ITEM(41, ESDCTL_BASE_ADDR + 0x01c, 0x052080b0) MXC_DCD_ITEM(42, ESDCTL_BASE_ADDR + 0x01c, 0x04008040) MXC_DCD_ITEM(43, ESDCTL_BASE_ADDR + 0x01c, 0x0000803a) MXC_DCD_ITEM(44, ESDCTL_BASE_ADDR + 0x01c, 0x0000803b) MXC_DCD_ITEM(45, ESDCTL_BASE_ADDR + 0x01c, 0x00028039) -MXC_DCD_ITEM(46, ESDCTL_BASE_ADDR + 0x01c, 0x09208138) +MXC_DCD_ITEM(46, ESDCTL_BASE_ADDR + 0x01c, 0x05208138) MXC_DCD_ITEM(47, ESDCTL_BASE_ADDR + 0x01c, 0x04008048) -MXC_DCD_ITEM(48, ESDCTL_BASE_ADDR + 0x020, 0x00001800) +MXC_DCD_ITEM(48, ESDCTL_BASE_ADDR + 0x020, 0x00005800) MXC_DCD_ITEM(49, ESDCTL_BASE_ADDR + 0x040, 0x04b80003) MXC_DCD_ITEM(50, ESDCTL_BASE_ADDR + 0x058, 0x00022227) MXC_DCD_ITEM(51, ESDCTL_BASE_ADDR + 0x01C, 0x00000000) diff --git a/board/freescale/mx53_loco/flash_header.S b/board/freescale/mx53_loco/flash_header.S index b451edc..03d5400 100644 --- a/board/freescale/mx53_loco/flash_header.S +++ b/board/freescale/mx53_loco/flash_header.S @@ -96,14 +96,14 @@ MXC_DCD_ITEM(37, ESDCTL_BASE_ADDR + 0x004, 0x0002002d) MXC_DCD_ITEM(38, ESDCTL_BASE_ADDR + 0x01c, 0x00008032) MXC_DCD_ITEM(39, ESDCTL_BASE_ADDR + 0x01c, 0x00008033) MXC_DCD_ITEM(40, ESDCTL_BASE_ADDR + 0x01c, 0x00028031) -MXC_DCD_ITEM(41, ESDCTL_BASE_ADDR + 0x01c, 0x092080b0) +MXC_DCD_ITEM(41, ESDCTL_BASE_ADDR + 0x01c, 0x052080b0) MXC_DCD_ITEM(42, ESDCTL_BASE_ADDR + 0x01c, 0x04008040) MXC_DCD_ITEM(43, ESDCTL_BASE_ADDR + 0x01c, 0x0000803a) MXC_DCD_ITEM(44, ESDCTL_BASE_ADDR + 0x01c, 0x0000803b) MXC_DCD_ITEM(45, ESDCTL_BASE_ADDR + 0x01c, 0x00028039) -MXC_DCD_ITEM(46, ESDCTL_BASE_ADDR + 0x01c, 0x09208138) +MXC_DCD_ITEM(46, ESDCTL_BASE_ADDR + 0x01c, 0x05208138) MXC_DCD_ITEM(47, ESDCTL_BASE_ADDR + 0x01c, 0x04008048) -MXC_DCD_ITEM(48, ESDCTL_BASE_ADDR + 0x020, 0x00001800) +MXC_DCD_ITEM(48, ESDCTL_BASE_ADDR + 0x020, 0x00005800) MXC_DCD_ITEM(49, ESDCTL_BASE_ADDR + 0x040, 0x04b80003) MXC_DCD_ITEM(50, ESDCTL_BASE_ADDR + 0x058, 0x00022227) MXC_DCD_ITEM(51, ESDCTL_BASE_ADDR + 0x01C, 0x00000000) diff --git a/board/freescale/mx53_smd/flash_header.S b/board/freescale/mx53_smd/flash_header.S index b451edc..03d5400 100644 --- a/board/freescale/mx53_smd/flash_header.S +++ b/board/freescale/mx53_smd/flash_header.S @@ -96,14 +96,14 @@ MXC_DCD_ITEM(37, ESDCTL_BASE_ADDR + 0x004, 0x0002002d) MXC_DCD_ITEM(38, ESDCTL_BASE_ADDR + 0x01c, 0x00008032) MXC_DCD_ITEM(39, ESDCTL_BASE_ADDR + 0x01c, 0x00008033) MXC_DCD_ITEM(40, ESDCTL_BASE_ADDR + 0x01c, 0x00028031) -MXC_DCD_ITEM(41, ESDCTL_BASE_ADDR + 0x01c, 0x092080b0) +MXC_DCD_ITEM(41, ESDCTL_BASE_ADDR + 0x01c, 0x052080b0) MXC_DCD_ITEM(42, ESDCTL_BASE_ADDR + 0x01c, 0x04008040) MXC_DCD_ITEM(43, ESDCTL_BASE_ADDR + 0x01c, 0x0000803a) MXC_DCD_ITEM(44, ESDCTL_BASE_ADDR + 0x01c, 0x0000803b) MXC_DCD_ITEM(45, ESDCTL_BASE_ADDR + 0x01c, 0x00028039) -MXC_DCD_ITEM(46, ESDCTL_BASE_ADDR + 0x01c, 0x09208138) +MXC_DCD_ITEM(46, ESDCTL_BASE_ADDR + 0x01c, 0x05208138) MXC_DCD_ITEM(47, ESDCTL_BASE_ADDR + 0x01c, 0x04008048) -MXC_DCD_ITEM(48, ESDCTL_BASE_ADDR + 0x020, 0x00001800) +MXC_DCD_ITEM(48, ESDCTL_BASE_ADDR + 0x020, 0x00005800) MXC_DCD_ITEM(49, ESDCTL_BASE_ADDR + 0x040, 0x04b80003) MXC_DCD_ITEM(50, ESDCTL_BASE_ADDR + 0x058, 0x00022227) MXC_DCD_ITEM(51, ESDCTL_BASE_ADDR + 0x01C, 0x00000000) -- cgit v1.1