From 807fc702e0b09ac7bc335acfd3b0f54f9f08b643 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Sun, 8 Apr 2012 18:57:18 +0000 Subject: driver/mtd: IFC NAND: Add support of ONFI NAND flash - Fix NAND_CMD_READID command for ONFI detect. - Add NAND_CMD_PARAM command to read the ONFI parameter page. Signed-off-by: Prabhakar Kushwaha Acked-by: Scott Wood Signed-off-by: Scott Wood --- drivers/mtd/nand/fsl_ifc_nand.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index 5cac78b..a518526 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -384,19 +384,30 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, /* READID must read all possible bytes while CEB is active */ case NAND_CMD_READID: + case NAND_CMD_PARAM: { + int timing = IFC_FIR_OP_RB; + if (command == NAND_CMD_PARAM) + timing = IFC_FIR_OP_RBCD; + out_be32(&ifc->ifc_nand.nand_fir0, (IFC_FIR_OP_CMD0 << IFC_NAND_FIR0_OP0_SHIFT) | (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) | - (IFC_FIR_OP_RB << IFC_NAND_FIR0_OP2_SHIFT)); + (timing << IFC_NAND_FIR0_OP2_SHIFT)); out_be32(&ifc->ifc_nand.nand_fcr0, - NAND_CMD_READID << IFC_NAND_FCR0_CMD0_SHIFT); - /* 4 bytes for manuf, device and exts */ - out_be32(&ifc->ifc_nand.nand_fbcr, 4); - ctrl->read_bytes = 4; + command << IFC_NAND_FCR0_CMD0_SHIFT); + out_be32(&ifc->ifc_nand.row3, column); + + /* + * although currently it's 8 bytes for READID, we always read + * the maximum 256 bytes(for PARAM) + */ + out_be32(&ifc->ifc_nand.nand_fbcr, 256); + ctrl->read_bytes = 256; set_addr(mtd, 0, 0, 0); fsl_ifc_run_command(mtd); return; + } /* ERASE1 stores the block and page address */ case NAND_CMD_ERASE1: -- cgit v1.1