From 745a3ba4500140a8af7320b601d6741af0829251 Mon Sep 17 00:00:00 2001 From: Jose Miguel Sanchez Sanabria Date: Mon, 5 Feb 2018 09:12:24 +0100 Subject: Added default MAC support Added multiple USB support Added Marvell PHY Led fix Added auto-loading Environment --- board/isee/common/igep_common.h | 8 +- board/isee/igep0046/Kconfig | 12 +++ board/isee/igep0046/Makefile | 2 +- board/isee/igep0046/igep0046.c | 186 +++++++++++++++------------------- board/isee/igep0046/igep0046_eeprom.c | 14 +-- configs/igep0046_imx6dl_2G_defconfig | 13 ++- include/configs/igep0046.h | 52 +++++----- 7 files changed, 135 insertions(+), 152 deletions(-) diff --git a/board/isee/common/igep_common.h b/board/isee/common/igep_common.h index 1d7e20d..1e58c8a 100644 --- a/board/isee/common/igep_common.h +++ b/board/isee/common/igep_common.h @@ -11,7 +11,7 @@ #ifndef __COMMON_HEADER__ #define __COMMON_HEADER__ -struct igep_mf_setup { +struct __attribute__((packed)) igep_mf_setup { u32 magic_id; /* eeprom magic id */ u32 crc32; /* eeprom crc32 */ char board_uuid [37]; /* board identifier */ @@ -23,9 +23,9 @@ struct igep_mf_setup { char board_manufacturer[30]; /* board manufacturer */ char manf_of[10]; /* manufacturer order of fabrication */ char manf_timestamp[16]; /* manufacturer timestamp */ - char bmac0[6]; /* MAC 0 - default */ - char bmac1[6]; /* MAC 1 */ -}__attribute__((packet)); + uchar bmac0[6]; /* MAC 0 - default */ + uchar bmac1[6]; /* MAC 1 */ +}; #endif diff --git a/board/isee/igep0046/Kconfig b/board/isee/igep0046/Kconfig index 5126b11..5ca6e3a 100644 --- a/board/isee/igep0046/Kconfig +++ b/board/isee/igep0046/Kconfig @@ -9,4 +9,16 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "igep0046" +choice + prompt "Carrier Board" + default BASE0040 + optional + +config BASE0040 + bool "Carrier board base0040" + help + This is the igep base0040 carrier board. + +endchoice + endif diff --git a/board/isee/igep0046/Makefile b/board/isee/igep0046/Makefile index 29e6362..6e521c9 100644 --- a/board/isee/igep0046/Makefile +++ b/board/isee/igep0046/Makefile @@ -6,6 +6,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_IGEP0046_CFG_EEPROM) += igep0046_eeprom.o +obj-y += igep0046_eeprom.o obj-$(CONFIG_POWER_PFUZE100) += pfuze.o obj-y += igep0046.o diff --git a/board/isee/igep0046/igep0046.c b/board/isee/igep0046/igep0046.c index bcd5646..22e1243 100644 --- a/board/isee/igep0046/igep0046.c +++ b/board/isee/igep0046/igep0046.c @@ -8,6 +8,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include @@ -19,10 +20,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include #include @@ -89,8 +92,8 @@ int dram_init(void) gd->ram_size = imx_ddr_size(); return 0; } -/* UART MUX */ +/* UART MUX */ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), @@ -162,39 +165,18 @@ static iomux_v3_cfg_t const init_pads[] = MX6_PAD_DI0_PIN3__GPIO4_IO19 | MUX_PAD_CTRL(GPIO_LED_PAD_CTRL), MX6_PAD_DI0_PIN4__GPIO4_IO20 | MUX_PAD_CTRL(GPIO_LED_PAD_CTRL), MX6_PAD_DI0_PIN15__GPIO4_IO17 | MUX_PAD_CTRL(GPIO_LED_PAD_CTRL), -}; - -#ifdef CONFIG_BASE0040 -/* GPIO USB BASE0040 MUX */ -static iomux_v3_cfg_t const init_pads[] = -{ + #ifdef CONFIG_BASE0040 + /* GPIO USB BASE0040 MUX */ MX6_PAD_CSI0_DAT4__GPIO5_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL), // USB_HUB_RESET MX6_PAD_CSI0_DAT5__GPIO5_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL), // USB_PWR1 - MX6_PAD_CSI0_DAT6__GPIO4_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), // USB_PWR2 - MX6_PAD_CSI0_DAT7__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), // USB_PWR3 -}; -#endif - -/* EEPROM CONFIGURATION */ -struct igep_mf_setup igep0046_eeprom_config = { - .magic_id = 12345678, - .crc32 = 0, - .board_uuid = "1234578", - .board_pid = "12345678", - .name = "IGEP0046", - .model = "full", - .pcb_version = "RD", - .assembly_rev = "10", - .board_manufacturer = "(c) ISEE (www.isee.biz)", - .manf_of = "12345678", - .manf_timestamp = "10:38 10/11/2014", - .bmac0 = "012345", - .bmac1 = "678901" + MX6_PAD_CSI0_DAT6__GPIO5_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), // USB_PWR2 + MX6_PAD_CSI0_DAT7__GPIO5_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), // USB_PWR3 + #endif }; const uchar igep_mac0 [6] = { 0x02, 0x00, 0x00, 0x00, 0x00, 0xff }; - static int igep_eeprom_valid = 0; +static struct igep_mf_setup igep0046_eeprom_config; /* I2C MUX */ #ifdef CONFIG_SYS_I2C @@ -248,17 +230,10 @@ static iomux_v3_cfg_t const usb_otg_pads[] = #ifdef CONFIG_BASE0040 static void reset_usb_hub(void) { - /* Reset USB HUB Base0040 */ - gpio_direction_output(IMX_GPIO_NR(5, 22) , 1); - udelay(100); // delay in usec - gpio_direction_output(IMX_GPIO_NR(5, 22) , 0); - udelay(100); // delay in usec - gpio_set_value(IMX_GPIO_NR(5, 22), 1); /* Activate USB_PWRx */ gpio_direction_output(IMX_GPIO_NR(5, 23), 1); gpio_direction_output(IMX_GPIO_NR(5, 24), 1); gpio_direction_output(IMX_GPIO_NR(5, 25), 1); - return 0; } #endif @@ -282,7 +257,6 @@ int board_ehci_hcd_init(int port) return 0; } - #endif #ifdef CONFIG_FSL_ESDHC @@ -316,7 +290,6 @@ int board_mmc_init(bd_t *bis) { int ret; int i; - /* * According to the board_mmc_init() the following map is done: * (U-boot device node) (Physical Port) @@ -357,20 +330,50 @@ int board_mmc_init(bd_t *bis) static void setup_iomux_enet(void) { imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); -} - -static int reset_enet_phy(struct mii_dev *bus) -{ - /* Reset Marvell Alaska PHY */ + gpio_request(IMX_GPIO_NR(1, 25), "ENET PHY Reset"); gpio_direction_output(IMX_GPIO_NR(1, 25) , 0); - udelay(500); + mdelay(15); gpio_set_value(IMX_GPIO_NR(1, 25), 1); - return 0; + mdelay(10); } + int board_phy_config(struct phy_device *phydev) { + unsigned short val; + + /* Marvel 88E1510 */ + if (phydev->phy_id == 0x1410dd1) { + /* + * Page 3, Register 16: LED[2:0] Function Control Register + * LED[0] (SPD:Amber) R16_3.3:0 to 0111: on-GbE link + * LED[1] (LNK:Green) R16_3.7:4 to 0001: on-link, blink-activity + */ + phy_write(phydev, MDIO_DEVAD_NONE, 22, 3); + val = phy_read(phydev, MDIO_DEVAD_NONE, 16); + val &= 0xff00; + val |= 0x0017; + phy_write(phydev, MDIO_DEVAD_NONE, 16, val); + phy_write(phydev, MDIO_DEVAD_NONE, 22, 0); + /* + * Page 0 Register 0: Copper Control Register + * Auto-Negotiation Enable R0_0.12: 0 Disable Auto-negotiation Process + * Speed Select (MSB) R0_0.6 to 0: 100 Mbps (01) + * Speed Select (LSB) R0_0.13 to 1: 100 Mbps (01) + * Core Duplex Mode R0_0.8 to 1: Full Duplex + */ + /* + val=0x0000; + val = phy_read(phydev, MDIO_DEVAD_NONE, 0); + val = 0xA100; + phy_write(phydev, MDIO_DEVAD_NONE, 0, val); + phy_write(phydev, MDIO_DEVAD_NONE, 22, 0); + */ + } + if (phydev->drv->config) phydev->drv->config(phydev); + /* Software Reset to apply changes */ + //miiphy_reset("FEC", 0); return 0; } @@ -383,45 +386,20 @@ const uchar* get_mac_address (void) int board_eth_init(bd_t *bis) { - uint32_t base = IMX_FEC_BASE; - struct mii_dev *bus = NULL; - struct phy_device *phydev = NULL; - int ret; eth_setenv_enetaddr("ethaddr", get_mac_address()); - setup_iomux_enet(); - //reset_enet_phy(); - #ifdef CONFIG_FEC_MXC - bus = fec_get_miibus(base, -1); - if (!bus) - return 0; - bus->reset = reset_enet_phy; - phydev = phy_find_by_mask(bus, CONFIG_FEC_MXC_PHYADDR, PHY_INTERFACE_MODE_RGMII); - if (!phydev) { - free(bus); - puts("no PHY found\n"); - return 0; - } - ret = fec_probe(bis, -1, base, bus, phydev); - if (ret) { - printf("FEC MXC: %s:failed\n", __func__); - free(phydev); - free(bus); - } - printf("%x - %s\n", phydev->addr, phydev->drv->name); + cpu_eth_init(bis); #endif return 0; } - int checkboard(void) { return 0; } - int board_early_init_f(void) { setup_iomux_uart(); @@ -434,6 +412,7 @@ int board_early_init_f(void) gpio_direction_output(IMX_GPIO_NR(4, 20), 0); gpio_direction_output(IMX_GPIO_NR(4, 17), 1); + return 0; } @@ -447,49 +426,35 @@ int board_init(void) setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); #endif -#ifdef CONFIG_IGEP0046_CFG_EEPROM - if(check_eeprom() != 0){ - printf("eeprom not found\n"); +if(check_eeprom() != 0){ + printf("EEPROM: not found\n"); +}else{ + /* Read configuration from eeprom */ + if(eeprom46_read_setup(0, (char*) &igep0046_eeprom_config, sizeof(struct igep_mf_setup))) + printf("EEPROM: read fail\n"); + /* Verify crc32 */ + crc_save_value = igep0046_eeprom_config.crc32; + igep0046_eeprom_config.crc32 = 0; + crc_value = crc32(0, (const unsigned char*) &igep0046_eeprom_config, sizeof(struct igep_mf_setup)); + if(crc_save_value != crc_value){ + printf("EEPROM: CRC32 failed. Loading default MAC\n"); }else{ - - // Write configuration struct into eeprom - /* - igep0046_eeprom_config.crc32 = crc32(0, (const unsigned char*) &igep0046_eeprom_config, sizeof(struct igep_mf_setup)); - if(!eeprom46_write_setup (0, (char*) &igep0046_eeprom_config, sizeof(struct igep_mf_setup))){ - printf("eeprom: writintg done\n"); - } - */ - // Read configuration from eeprom - if(eeprom46_read_setup(0, (char*) &igep0046_eeprom_config, sizeof(struct igep_mf_setup))){ - printf("eeprom: read fail\n"); - } - // Verify crc32 - crc_save_value = igep0046_eeprom_config.crc32; - igep0046_eeprom_config.crc32 = 0; - crc_value = crc32(0, (const unsigned char*) &igep0046_eeprom_config, sizeof(struct igep_mf_setup)); - if(crc_save_value != crc_value){ - printf("eeprom crc32 check loading mac from environment\n"); - - }else{ - printf("crc32 OK! Loading mac\n"); - igep_eeprom_valid = 1; - } + printf("EEPROM: CRC32 OK! Loading MAC from eeprom\n"); + igep_eeprom_valid = 1; } +} + +#ifdef CONFIG_BASE0040 + reset_usb_hub(); #endif #ifdef CONFIG_USB_EHCI_MX6 setup_usb(); #endif -#ifdef CONFIG_BASE0040 - reset_usb_hub(); -#endif - - return 0; } - static inline unsigned int pcb_version(void) { unsigned int pcb_version_bit0, pcb_version_bit1, @@ -562,10 +527,17 @@ int board_late_init(void) setenv("fdt_file", ""); break; } - return 0; } +#ifdef CONFIG_LDO_BYPASS_CHECK +/* TODO, use external pmic, for now always ldo_enable */ +void ldo_mode_set(int ldo_bypass) +{ + return; +} +#endif + #ifdef CONFIG_POWER int power_init_board(void) { @@ -588,10 +560,10 @@ int power_init_board(void) pmic_reg_write(p, PFUZE100_VGEN5VOL, reg); /* Decrease VGEN6 from 3.3 to 2.5V */ - pmic_reg_read(p, PFUZE100_VGEN6VOL, ®); - reg &= ~LDO_VOL_MASK; - reg |= LDOB_2_50V; - pmic_reg_write(p, PFUZE100_VGEN6VOL, reg); + //pmic_reg_read(p, PFUZE100_VGEN6VOL, ®); + //reg &= ~LDO_VOL_MASK; + //reg |= LDOB_2_50V; + //pmic_reg_write(p, PFUZE100_VGEN6VOL, reg); #endif return 0; } diff --git a/board/isee/igep0046/igep0046_eeprom.c b/board/isee/igep0046/igep0046_eeprom.c index 5fac831..9d3bc25 100644 --- a/board/isee/igep0046/igep0046_eeprom.c +++ b/board/isee/igep0046/igep0046_eeprom.c @@ -19,13 +19,13 @@ int eeprom46_write_setup (uint8_t s_addr, const char* data, u32 size) u32 remain = size % 32; u32 blocks = size / 32; for (i=0; i < blocks; i++){ - if(i2c_write(CONFIG_SYS_I2C_IGEP0046_CFG_BUS_ADDR, s_addr + (i*32), 2, (uint8_t*) data + (i*32), 32)){ + if(i2c_write(CONFIG_SYS_I2C_EEPROM_ADDR, s_addr + (i*32), 2, (uint8_t*) data + (i*32), 32)){ return -1; } udelay(5000); } if(remain > 0){ - if(i2c_write(CONFIG_SYS_I2C_IGEP0046_CFG_BUS_ADDR, s_addr + (i*32), 2, (uint8_t*) data + (i*32), remain)) + if(i2c_write(CONFIG_SYS_I2C_EEPROM_ADDR, s_addr + (i*32), 2, (uint8_t*) data + (i*32), remain)) return -1; else udelay(5000); @@ -39,23 +39,23 @@ int eeprom46_read_setup (uint8_t s_addr, char* data, u32 size) u32 remain = size % 32; u32 blocks = size / 32; for (i=0; i < blocks; i++){ - if(i2c_read(CONFIG_SYS_I2C_IGEP0046_CFG_BUS_ADDR, s_addr + (i*32), 2, (uint8_t*) data + (i*32), 32)){ + if(i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, s_addr + (i*32), 2, (uint8_t*) data + (i*32), 32)){ return -1; } } if(remain > 0) - if(i2c_read(CONFIG_SYS_I2C_IGEP0046_CFG_BUS_ADDR, s_addr + (i*32), 2, (uint8_t*) data + (i*32), remain)) + if(i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, s_addr + (i*32), 2, (uint8_t*) data + (i*32), remain)) return -1; return 0; } int check_eeprom (void) { - i2c_set_bus_num(CONFIG_SYS_I2C_IGEP0046_CFG_BUS_NUM); + i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS); /* Check if baseboard eeprom is available */ - if (i2c_probe(CONFIG_SYS_I2C_IGEP0046_CFG_BUS_ADDR)) { + if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) { debug("Could not probe the EEPROM at 0x%x\n", - CONFIG_SYS_I2C_IGEP0046_CFG_BUS_ADDR); + CONFIG_SYS_I2C_EEPROM_ADDR); return -1; } return 0; diff --git a/configs/igep0046_imx6dl_2G_defconfig b/configs/igep0046_imx6dl_2G_defconfig index 9658e25..2cc16c8 100644 --- a/configs/igep0046_imx6dl_2G_defconfig +++ b/configs/igep0046_imx6dl_2G_defconfig @@ -4,13 +4,12 @@ CONFIG_TARGET_IGEP0046=y CONFIG_SYS_MALLOC_F=y CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/isee/igep0046/mx6dl_igep0046_4x512_nt.cfg,MX6DL" -CONFIG_BOOTDELAY=2 -CONFIG_CMD_BOOTM=n -CONFIG_CMD_BOOTD=n +CONFIG_BOOTDELAY=3 +CONFIG_OF_LIBFDT=y CONFIG_CMD_CACHE=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SPLASH_SCREEN=n +CONFIG_DEFAULT_FDT_FILE="imx6dl-igep-base0040rc2.dtb" CONFIG_BASE0040=y -CONFIG_CONSOLE_DEV="ttymxc2" -CONFIG_DEFAULT_FDT_FILE="" -CONFIG_MMCROOT="" -CONFIG_EMMCROOT="" +CONFIG_HUSH_PARSER=y \ No newline at end of file diff --git a/include/configs/igep0046.h b/include/configs/igep0046.h index d6b61b9..1c3c872 100644 --- a/include/configs/igep0046.h +++ b/include/configs/igep0046.h @@ -22,26 +22,15 @@ /* UART Configs */ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART2_BASE -#define CONSOLE_DEV "ttymxc2" - +#define CONSOLE_DEV "ttymxc1" #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} -/* SOC specific Configs -#if defined(CONFIG_MX6Q) -#define CONFIG_DEFAULT_FDT_FILE "imx6q-igep-base0040rc2.dtb" -#elif defined(CONFIG_MX6DL) -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-igep-base0040rc2.dtb" -#endif -*/ - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) -/* Environment organization */ -#define CONFIG_ENV_SIZE (8 * 1024) - /* Physical Memory Map */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -54,6 +43,11 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +/* Begin and End Address of simple memory test */ +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + /* Miscellaneous configurable options */ #define CONFIG_AUTOBOOT_KEYED #define CONFIG_AUTOBOOT_PROMPT "Press ESC to abort autoboot in %d seconds\n" @@ -61,6 +55,7 @@ #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_AUTO_COMPLETE +#define CONFIG_LOADADDR 0x12000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_CMDLINE_EDITING #define CONFIG_STACKSIZE (128 * 1024) @@ -94,14 +89,14 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_DOS_PARTITION + #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_BOUNCE_BUFFER #define CONFIG_FAT_WRITE /* EEPROM Configs */ -#define CONFIG_IGEP0046_CFG_EEPROM -#define CONFIG_SYS_I2C_IGEP0046_CFG_BUS_NUM 2 -#define CONFIG_SYS_I2C_IGEP0046_CFG_BUS_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_BUS 2 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* NET Configs */ #define CONFIG_ENV_OVERWRITE /* To allow write MAC into ethaddr variable */ @@ -113,14 +108,15 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 1 +#define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_PHYLIB #define CONFIG_PHY_MARVELL +/* Initial ARP Hangs so configure small timeout */ + /* USB Configs */ /* Host */ #define CONFIG_USB -#define CONFIG_CMD_USB /* Enable USB Commands */ #define CONFIG_USB_EHCI /* EHCI driver */ #define CONFIG_USB_EHCI_MX6 /* iMX6 EHCI driver */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* OTG Core Init after Reset*/ @@ -138,7 +134,6 @@ #define CONFIG_USB_GADGET /* USB Device Gadget Layer support */ #define CONFIG_USB_GADGET_DUALSPEED /* USB Device High speed support Ethernet */ #define CONFIG_USB_FUNCTION_MASS_STORAGE /* USB Device Mass Storage support */ -#define CONFIG_CMD_USB_MASS_STORAGE /* USB CMD Mass Storage suppor */ #define CONFIG_USB_GADGET_DOWNLOAD /* USB Download Gadget support */ #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* Maximum VBUS power usage (2-500 mA) */ #define CONFIG_G_DNL_VENDOR_NUM 0x0525 /* Vendor ID of USB Device */ @@ -146,10 +141,15 @@ #define CONFIG_G_DNL_MANUFACTURER "FSL" /* Manufacturer of USB Device */ /* Environment */ -#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_SIZE (128 * 1024) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 +/* Commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_BOOTZ +#undef CONFIG_CMD_IMLS + #ifdef CONFIG_SUPPORT_EMMC_BOOT #define EMMC_ENV \ "emmcdev=1\0" \ @@ -192,7 +192,7 @@ "mmcdev=0\0" \ "mmcpart=1\0" \ "mmcroot="CONFIG_MMCROOT " rootwait rw\0" \ - "emmcroot="CONFIG_EMMCROOT " rootwait rw\0" \ + "emmcroot=/dev/mmcblk2p2 rootwait rw\0" \ "emmcdevconf=setenv mmcdev ${emmcdev}\0" \ "emmcrootconf=setenv mmcroot ${emmcroot}\0" \ "update_sd_firmware=" \ @@ -247,8 +247,10 @@ "netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs " \ "ip=dhcp nfsroot=${serverip}:${rootnfs},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ + "netboot=echo Booting from net ... need 22 seconds to complete ethernet autonegotiation; " \ "run netargs; " \ + "sleep 22; " \ + "ping ${serverip}; " \ "if test ${ip_dyn} = yes; then " \ "setenv get_cmd dhcp; " \ "else " \ @@ -305,13 +307,13 @@ "fdt_addr=0x18000000\0" \ "boot_fdt=try\0" \ "ip_dyn=no\0" \ - "console=" CONFIG_CONSOLE_DEV "\0" \ + "console=" CONSOLE_DEV "\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "mmcdev=0\0" \ "mmcpart=1\0" \ "mmcroot="CONFIG_MMCROOT " rootwait rw\0" \ - "emmcroot="CONFIG_EMMCROOT " rootwait rw\0" \ + "emmcroot=/dev/mmcblk2p2 rootwait rw\0" \ "sataroot="CONFIG_SATAROOT " rootwait rw\0" \ "emmcdevconf=setenv mmcdev ${emmcdev}\0" \ "emmcrootconf=setenv mmcroot ${emmcroot}\0" \ @@ -446,8 +448,6 @@ "fi; " \ "run netboot;" #endif - - #endif /* __IGEP0046_CONFIG_H */ -- cgit v1.1