From 738fa47255b9d8becc09df38178da175c2fc0527 Mon Sep 17 00:00:00 2001 From: "Ye.Li" Date: Wed, 22 Jan 2014 17:04:07 +0800 Subject: ENGR00296077 ARM:imx6sl: reset can NOT work on TO1.2 Boot ROM fix the "glitchless mux" issue on TO1.2 which will mask MMDC_CH0_MASK in CCM_CCDR, it will cause different behavior of reset, need to clear this MMDC_CHx_MASK field to make sure all the i.MX6 series SOCs have same behavior of reset. Signed-off-by: Ye.Li (cherry picked from commit c168913446d199b1dc3f10ecb3b691cbd8e01690) --- arch/arm/cpu/armv7/mx6/soc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index bca0bb7..49344e2 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -2,7 +2,7 @@ * (C) Copyright 2007 * Sascha Hauer, Pengutronix * - * (C) Copyright 2009-2013 Freescale Semiconductor, Inc. + * (C) Copyright 2009-2014 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -372,6 +372,9 @@ static void imx_set_pcie_phy_power_down(void) int arch_cpu_init(void) { + /* Clear MMDC channel mask */ + writel(0, CCM_BASE_ADDR + CLKCTL_CCDR); + init_aips(); set_vddsoc(1200); /* Set VDDSOC to 1.2V */ -- cgit v1.1