From 51056dd9863e6a1bc363afbbe1775c58cd967418 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Wed, 11 Apr 2007 17:22:55 +0200 Subject: Update for SC3 board * Make IDE timeout configurable through ide_reset_timeout variable. * Use Newline as "password" string * Use just a single partition in NAND flash --- common/cmd_ide.c | 13 +++++++------ include/configs/sc3.h | 10 +++++----- 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/common/cmd_ide.c b/common/cmd_ide.c index 2e185cc..b4119f3 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -513,9 +513,11 @@ void ide_init (void) #endif unsigned char c; int i, bus; +#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3) + unsigned int ata_reset_time; +#endif #ifdef CONFIG_AMIGAONEG3SE unsigned int max_bus_scan; - unsigned int ata_reset_time; char *s; #endif #ifdef CONFIG_IDE_8xx_PCCARD @@ -617,10 +619,9 @@ void ide_init (void) udelay (100000); /* 100 ms */ ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev)); udelay (100000); /* 100 ms */ -#ifdef CONFIG_AMIGAONEG3SE - ata_reset_time = ATA_RESET_TIME; - s = getenv("ide_reset_timeout"); - if (s) ata_reset_time = 2*simple_strtol(s, NULL, 10); +#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3) + if ((s = getenv("ide_reset_timeout")) != NULL) + ata_reset_time = simple_strtol(s, NULL, 10); #endif i = 0; do { @@ -628,7 +629,7 @@ void ide_init (void) c = ide_inb (dev, ATA_STATUS); i++; -#ifdef CONFIG_AMIGAONEG3SE +#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3) if (i > (ata_reset_time * 100)) { #else if (i > (ATA_RESET_TIME * 100)) { diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 8298084..6b6acfa 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -133,8 +133,8 @@ #if 1 /* feel free to disable for development */ #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ -#define CONFIG_AUTOBOOT_PROMPT "\nSC3 - booting... stop with S\n" -#define CONFIG_AUTOBOOT_DELAY_STR "S" /* 1st "password" */ +#define CONFIG_AUTOBOOT_PROMPT "\nSC3 - booting... stop with ENTER\n" +#define CONFIG_AUTOBOOT_DELAY_STR "\n" /* 1st "password" */ #endif /* @@ -416,11 +416,11 @@ extern unsigned long offsetOfEnvironment; #define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */ -/* No command line, one static partition Partition 3 contains jffs2 rootfs */ +/* No command line, one static partition */ #undef CONFIG_JFFS2_CMDLINE #define CONFIG_JFFS2_DEV "nand0" -#define CONFIG_JFFS2_PART_SIZE 0x00400000 -#define CONFIG_JFFS2_PART_OFFSET 0x00c00000 +#define CONFIG_JFFS2_PART_SIZE 0x01000000 +#define CONFIG_JFFS2_PART_OFFSET 0x00000000 /*----------------------------------------------------------------------- * Cache Configuration -- cgit v1.1 From 6c9ba919375db977aaad9146bf320c7afd07ae7a Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Wed, 11 Apr 2007 17:25:01 +0200 Subject: Update CHANGELOG Signed-off-by: Wolfgang Denk --- CHANGELOG | 123 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/CHANGELOG b/CHANGELOG index 7425ceb..326732d 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,19 @@ +commit 51056dd9863e6a1bc363afbbe1775c58cd967418 +Author: Wolfgang Denk +Date: Wed Apr 11 17:22:55 2007 +0200 + + Update for SC3 board + + * Make IDE timeout configurable through ide_reset_timeout variable. + * Use Newline as "password" string + * Use just a single partition in NAND flash + +commit 31c98a88228021b314c89ebb8104fb6473da4471 +Author: Wolfgang Denk +Date: Wed Apr 4 02:09:30 2007 +0200 + + Minor coding style cleanup. + commit 94abd7c0583ebe01e799b25f451201deeaab550d Author: Wolfgang Denk Date: Wed Apr 4 01:49:15 2007 +0200 @@ -66,6 +82,63 @@ Date: Sat Mar 31 11:59:59 2007 -0400 This adds the applicable libfdt source files (unmodified) and a README to explain where the source came from. +commit da6ebc1bc082cbe3b6bbde079cafe09f7ebbad4b +Author: Stefan Roese +Date: Sat Mar 31 13:16:23 2007 +0200 + + ppc4xx: Update Katmai bootstrap command + + Now the DDR2 frequency is also 2*PLB frequency when 166MHz PLB + is selected. + + Signed-off-by: Stefan Roese + +commit cabee756a6532986729477c3cc1ea16ef8517ad2 +Author: Stefan Roese +Date: Sat Mar 31 13:15:06 2007 +0200 + + ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe) + + Additional RAM information is now printed upon powerup, like + DDR2 frequency and CAS latency. + + Signed-off-by: Stefan Roese + +commit 60723803431ac75cad085690789e433d5ab9174e +Author: Stefan Roese +Date: Sat Mar 31 08:48:36 2007 +0200 + + ppc4xx: Change Yucca config file to support ECC + + With the updated 44x DDR2 driver the Yucca board now supports + ECC generation and checking. + + Signed-off-by: Stefan Roese + +commit 490e5730c674b20d708b783a2c5ffd7208f83873 +Author: Stefan Roese +Date: Sat Mar 31 08:47:34 2007 +0200 + + ppc4xx: Fix "bootstrap" command for Katmai board + + The board specific "bootstrap" command is now fixed and can + be used for the AMCC Katmai board to configure different + CPU/PLB/OPB frequencies. + + Signed-off-by: Stefan Roese + +commit 94f54703c3a776ec23e427ca2a16e0a79a5d50c1 +Author: Stefan Roese +Date: Sat Mar 31 08:46:08 2007 +0200 + + ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe) + + Fix a bug in the auto calibration routine. This driver now runs + more reliable with the tested modules. It's also tested with + 167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai. + + Signed-off-by: Stefan Roese + commit 342cd097be1e7affe82f42ab3da220959a699e64 Author: Michal Simek Date: Fri Mar 30 22:52:09 2007 +0200 @@ -78,6 +151,26 @@ Date: Fri Mar 30 22:42:45 2007 +0200 [CLEAN] Remove inefficient Suzaku code +commit 430f1b0f9a670c2f13eaa52e66a10db96dd3647d +Author: Stefan Roese +Date: Wed Mar 28 15:03:16 2007 +0200 + + Merge some AMCC make targets to keep the top-level Makefile smaller + + Signed-off-by: Stefan Roese + +commit 0c75c9d84307a9f1cbe1ff0c4d8937ee3a96475e +Author: Stefan Roese +Date: Wed Mar 28 14:52:12 2007 +0200 + + i2c: Enable "old" i2c commands even when CONFIG_I2C_CMD_TREE is defined + + The "old" i2c commands (iprobe, imd...) are now compiled in again, + even when the i2c command tree is enabled via the CONFIG_I2C_CMD_TREE + config option. + + Signed-off-by: Stefan Roese + commit 5da048adf44bea5e3b94080d02903c2e3fe7aa4a Author: Michal Simek Date: Tue Mar 27 00:32:16 2007 +0200 @@ -92,6 +185,36 @@ Date: Mon Mar 26 01:39:07 2007 +0200 Reset support BSP autoconfig support +commit 0d974d5297349504a2ddfa09314be573b5df320a +Author: Stefan Roese +Date: Sat Mar 24 15:57:09 2007 +0100 + + [PATCH] Add 4xx GPIO functions + + This patch adds some 4xx GPIO functions. It also moves some of the + common code and defines into a common 4xx GPIO header file. + + Signed-off-by: Stefan Roese + +commit 2db633658bbf366ab0c8dad7a0727e1fb2ae6b11 +Author: Stefan Roese +Date: Sat Mar 24 15:55:58 2007 +0100 + + [PATCH] Small Sequoia cleanup + + Signed-off-by: Stefan Roese + +commit 3cb86f3e40d2a80356177434a99f75bc8baa9caf +Author: Stefan Roese +Date: Sat Mar 24 15:45:34 2007 +0100 + + [PATCH] Clean up 40EZ/Acadia support + + This patch cleans up all the open issue of the preliminary + Acadia support. + + Signed-off-by: Stefan Roese + commit 6eb1df835191d8ce4b81d5af40fa8e0fbe78e997 Author: Jon Loeliger Date: Tue Dec 12 11:02:20 2006 -0600 -- cgit v1.1 From 37403005cfe6bb13964d450f6a48a0b0f2f7017e Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Sat, 14 Apr 2007 05:26:48 +0200 Subject: [Fix] Set the LED status register on the UC101 for the LXT971 PHY. clear the Display after reset. Signed-off-by: Heiko Schocher --- board/uc101/uc101.c | 2 ++ cpu/mpc5xxx/fec.c | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/board/uc101/uc101.c b/board/uc101/uc101.c index 7a6b3be..f726513 100644 --- a/board/uc101/uc101.c +++ b/board/uc101/uc101.c @@ -221,6 +221,8 @@ long int initdram (int board_type) int checkboard (void) { puts ("Board: MAN UC101\n"); + /* clear the Display */ + *(char *)(CFG_DISP_CWORD) = 0x80; return 0; } diff --git a/cpu/mpc5xxx/fec.c b/cpu/mpc5xxx/fec.c index 13a3870..e59bd85 100644 --- a/cpu/mpc5xxx/fec.c +++ b/cpu/mpc5xxx/fec.c @@ -467,6 +467,10 @@ static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis) miiphy_write(dev->name, phyAddr, 0x0, 0x8000); udelay(1000); +#if defined(CONFIG_UC101) + /* Set the LED configuration Register for the UC101 Board */ + miiphy_write(dev->name, phyAddr, 0x14, 0x4122); +#endif if (fec->xcv_type == MII10) { /* * Force 10Base-T, FDX operation -- cgit v1.1 From 8048cdd56f04a756eeea4951f402bf5cc33785db Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sat, 14 Apr 2007 21:16:54 +0200 Subject: Update CHANGELOG --- CHANGELOG | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/CHANGELOG b/CHANGELOG index 326732d..b07f80a 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,20 @@ +commit 37403005cfe6bb13964d450f6a48a0b0f2f7017e +Author: Heiko Schocher +Date: Sat Apr 14 05:26:48 2007 +0200 + + [Fix] Set the LED status register on the UC101 for the LXT971 PHY. + clear the Display after reset. + + Signed-off-by: Heiko Schocher + +commit 6c9ba919375db977aaad9146bf320c7afd07ae7a +Author: Wolfgang Denk +Date: Wed Apr 11 17:25:01 2007 +0200 + + Update CHANGELOG + + Signed-off-by: Wolfgang Denk + commit 51056dd9863e6a1bc363afbbe1775c58cd967418 Author: Wolfgang Denk Date: Wed Apr 11 17:22:55 2007 +0200 -- cgit v1.1