From c2fbcb6ae86c10621a386c13be57eaa766221ed5 Mon Sep 17 00:00:00 2001 From: Harald Krapfenbauer Date: Tue, 18 Aug 2009 04:49:57 -0400 Subject: Blackfin: cm-bf527/cm-bf537: increase flash sectors Newer revisions of these boards have slightly larger flashes, so increase the configured number of sectors so that U-Boot works on all revisions. Signed-off-by: Harald Krapfenbauer Signed-off-by: Mike Frysinger --- include/configs/cm-bf527.h | 2 +- include/configs/cm-bf537e.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/cm-bf527.h b/include/configs/cm-bf527.h index 79d06fb..1592719 100644 --- a/include/configs/cm-bf527.h +++ b/include/configs/cm-bf527.h @@ -95,7 +95,7 @@ #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 64 +#define CONFIG_SYS_MAX_FLASH_SECT 67 /* diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h index 021b631..34d4299 100644 --- a/include/configs/cm-bf537e.h +++ b/include/configs/cm-bf537e.h @@ -79,7 +79,7 @@ #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 32 +#define CONFIG_SYS_MAX_FLASH_SECT 35 /* -- cgit v1.1 From e637385e69f63bc73b9dfd2ddd8d0f383790ca28 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 20 Aug 2009 19:17:59 -0400 Subject: Blackfin: fix typos in gpio comments Signed-off-by: Mike Frysinger --- board/cm-bf527/gpio_cfi_flash.c | 6 +++--- board/cm-bf537e/gpio_cfi_flash.c | 6 +++--- board/tcm-bf537/gpio_cfi_flash.c | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/board/cm-bf527/gpio_cfi_flash.c b/board/cm-bf527/gpio_cfi_flash.c index 565d900..7167680 100644 --- a/board/cm-bf527/gpio_cfi_flash.c +++ b/board/cm-bf527/gpio_cfi_flash.c @@ -51,9 +51,9 @@ u##size flash_read##size(void *addr) \ return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \ } MAKE_FLASH(8, b) /* flash_write8() flash_read8() */ -MAKE_FLASH(16, w) /* flash_write16() flash_write16() */ -MAKE_FLASH(32, l) /* flash_write32() flash_write32() */ -MAKE_FLASH(64, q) /* flash_write64() flash_write64() */ +MAKE_FLASH(16, w) /* flash_write16() flash_read16() */ +MAKE_FLASH(32, l) /* flash_write32() flash_read32() */ +MAKE_FLASH(64, q) /* flash_write64() flash_read64() */ void gpio_cfi_flash_init(void) { diff --git a/board/cm-bf537e/gpio_cfi_flash.c b/board/cm-bf537e/gpio_cfi_flash.c index bb35169..a9e69cf 100644 --- a/board/cm-bf537e/gpio_cfi_flash.c +++ b/board/cm-bf537e/gpio_cfi_flash.c @@ -49,9 +49,9 @@ u##size flash_read##size(void *addr) \ return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \ } MAKE_FLASH(8, b) /* flash_write8() flash_read8() */ -MAKE_FLASH(16, w) /* flash_write16() flash_write16() */ -MAKE_FLASH(32, l) /* flash_write32() flash_write32() */ -MAKE_FLASH(64, q) /* flash_write64() flash_write64() */ +MAKE_FLASH(16, w) /* flash_write16() flash_read16() */ +MAKE_FLASH(32, l) /* flash_write32() flash_read32() */ +MAKE_FLASH(64, q) /* flash_write64() flash_read64() */ void gpio_cfi_flash_init(void) { diff --git a/board/tcm-bf537/gpio_cfi_flash.c b/board/tcm-bf537/gpio_cfi_flash.c index 7137d12..ac8587c 100644 --- a/board/tcm-bf537/gpio_cfi_flash.c +++ b/board/tcm-bf537/gpio_cfi_flash.c @@ -51,9 +51,9 @@ u##size flash_read##size(void *addr) \ return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \ } MAKE_FLASH(8, b) /* flash_write8() flash_read8() */ -MAKE_FLASH(16, w) /* flash_write16() flash_write16() */ -MAKE_FLASH(32, l) /* flash_write32() flash_write32() */ -MAKE_FLASH(64, q) /* flash_write64() flash_write64() */ +MAKE_FLASH(16, w) /* flash_write16() flash_read16() */ +MAKE_FLASH(32, l) /* flash_write32() flash_read32() */ +MAKE_FLASH(64, q) /* flash_write64() flash_read64() */ void gpio_cfi_flash_init(void) { -- cgit v1.1 From 30fc5cd3116cb112d0aab7e6d7c8eef1b67ed075 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 25 Aug 2009 12:22:38 +0200 Subject: include/s3c24x0.h: fix S3C24X0_SPI_CHANNEL declaration The SPI controller on the S3C24X0 has 8 bit registers, not 32 bit. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Wolfgang Denk --- include/s3c24x0.h | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/include/s3c24x0.h b/include/s3c24x0.h index 71f35a5..4fa8000 100644 --- a/include/s3c24x0.h +++ b/include/s3c24x0.h @@ -550,14 +550,20 @@ typedef struct { /* SPI (see manual chapter 22) */ typedef struct { - S3C24X0_REG32 SPCON; - S3C24X0_REG32 SPSTA; - S3C24X0_REG32 SPPIN; - S3C24X0_REG32 SPPRE; - S3C24X0_REG32 SPTDAT; - S3C24X0_REG32 SPRDAT; - S3C24X0_REG32 res[2]; -} __attribute__((__packed__)) S3C24X0_SPI_CHANNEL; + S3C24X0_REG8 SPCON; + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 SPSTA; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 SPPIN; + S3C24X0_REG8 res3[3]; + S3C24X0_REG8 SPPRE; + S3C24X0_REG8 res4[3]; + S3C24X0_REG8 SPTDAT; + S3C24X0_REG8 res5[3]; + S3C24X0_REG8 SPRDAT; + S3C24X0_REG8 res6[3]; + S3C24X0_REG8 res7[16]; +} /*__attribute__((__packed__))*/ S3C24X0_SPI_CHANNEL; typedef struct { S3C24X0_SPI_CHANNEL ch[S3C24X0_SPI_CHANNELS]; -- cgit v1.1 From 68e74567cf317318df52dbcb2ac170ffc5e7758a Mon Sep 17 00:00:00 2001 From: Feng Kan Date: Fri, 21 Aug 2009 10:59:42 -0700 Subject: ppc4xx: Fix ECC Correction bug with SMC ordering for NDFC driver Fix ECC Correction bug where the byte offset location were double flipped causing correction routine to toggle the wrong byte location in the ECC segment. The ndfc_calculate_ecc routine change the order of getting the ECC code. /* The NDFC uses Smart Media (SMC) bytes order */ ecc_code[0] = p[2]; ecc_code[1] = p[1]; ecc_code[2] = p[3]; But in the Correction algorithm when calculating the byte offset location, the s1 is used as the upper part of the address. Which again reverse the order making the final byte offset address location incorrect. byteoffs = (s1 << 0) & 0x80; . . byteoffs |= (s0 >> 4) & 0x08; The order is change to read it in straight and let the correction function to revert it to SMC order. Signed-off-by: Feng Kan Acked-by: Victor Gallardo Acked-by: Prodyut Hazarika Signed-off-by: Stefan Roese --- drivers/mtd/nand/ndfc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index 528b22b..0891936 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -89,8 +89,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo, /* The NDFC uses Smart Media (SMC) bytes order */ - ecc_code[0] = p[2]; - ecc_code[1] = p[1]; + ecc_code[0] = p[1]; + ecc_code[1] = p[2]; ecc_code[2] = p[3]; return 0; -- cgit v1.1