From 1487adbdcf9594bb2eb686325a6f9540dad1b70a Mon Sep 17 00:00:00 2001 From: Ed Swarthout Date: Wed, 26 Sep 2007 16:35:54 -0500 Subject: 85xx io out functions need sync after write. This fixes the mc146818 rtc_read/write functions for 85xx. Signed-off-by: Ed Swarthout --- cpu/mpc85xx/start.S | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 2c98c2a..5d65190 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -701,6 +701,7 @@ in8: .globl out8 out8: stb r4,0x0000(r3) + sync blr /*------------------------------------------------------------------------------- */ @@ -710,6 +711,7 @@ out8: .globl out16 out16: sth r4,0x0000(r3) + sync blr /*------------------------------------------------------------------------------- */ @@ -719,6 +721,7 @@ out16: .globl out16r out16r: sthbrx r4,r0,r3 + sync blr /*------------------------------------------------------------------------------- */ @@ -728,6 +731,7 @@ out16r: .globl out32 out32: stw r4,0x0000(r3) + sync blr /*------------------------------------------------------------------------------- */ @@ -737,6 +741,7 @@ out32: .globl out32r out32r: stwbrx r4,r0,r3 + sync blr /*------------------------------------------------------------------------------- */ -- cgit v1.1 From e1ce3cb617bb06f91f82f98915391175addf3e82 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 2 Oct 2007 11:12:27 -0500 Subject: Remove magic numbers from cache related operations for mpc85xx The mpc85xx start code uses some magic numbers that we actually have #defines for in so use those instead. Signed-off-by: Kumar Gala --- cpu/mpc85xx/start.S | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 5d65190..e5cabca 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -266,13 +266,13 @@ _start_e500: */ lis r3,CFG_INIT_RAM_ADDR@h ori r3,r3,CFG_INIT_RAM_ADDR@l - li r2,512 /* 512*32=16K */ + li r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) mtctr r2 li r0,0 1: dcbz r0,r3 dcbtls 0,r0,r3 - addi r3,r3,32 + addi r3,r3,CFG_CACHELINE_SIZE bdnz 1b /* Jump out the last 4K page and continue to 'normal' start */ @@ -1066,11 +1066,11 @@ unlock_ram_in_cache: /* invalidate the INIT_RAM section */ lis r3,(CFG_INIT_RAM_ADDR & ~31)@h ori r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l - li r4,512 + li r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) mtctr r4 1: icbi r0,r3 dcbi r0,r3 - addi r3,r3,32 + addi r3,r3,CFG_CACHELINE_SIZE bdnz 1b sync /* Wait for all icbi to complete on bus */ isync -- cgit v1.1 From a3063eec775719b7e91023bbec3f64b3118791df Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 11 Oct 2007 00:18:48 -0500 Subject: Set OF_STDOUT_PATH to match the default console on MPC8568 MDS On the MPC8568 MDS we use ttyS0, UART0, etc. as the standard configured console. Make it so we match that config what we tell Linux as the early STDOUT console. Signed-off-by: Kumar Gala --- include/configs/MPC8568MDS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ba744e9..548e158 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -297,7 +297,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8568@e0000000" #define OF_QE "qe@e0080000" #define OF_TBCLK (bd->bi_busfreq / 8) -#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4600" +#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4500" /* * I2C -- cgit v1.1 From 7600d47b8f6a10019e537dc9a62aa1498df58d25 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 11 Oct 2007 00:29:18 -0500 Subject: Improve handling of PCI interrupt device tree fixup on MPC85xx CDS On the MPC85xx CDS we have two issues: 1. The device tree fixup code did not check to see if the property we are trying to update is actually found. Its possible that it would update random memory starting at 0. 2. Newer Linux kernel's have moved the location of the PCI nodes to be sibilings of the soc node and not children. The explicit PATH to the PCI node would not be found for these device trees. Add the ability to handle both paths. In the future we shouldn't handle such fixups by explicit path. Signed-off-by: Kumar Gala --- board/cds/common/ft_board.c | 23 +++++++++++++++-------- include/configs/MPC8541CDS.h | 1 + include/configs/MPC8548CDS.h | 1 + include/configs/MPC8555CDS.h | 1 + 4 files changed, 18 insertions(+), 8 deletions(-) diff --git a/board/cds/common/ft_board.c b/board/cds/common/ft_board.c index 9d97905..3eda100 100644 --- a/board/cds/common/ft_board.c +++ b/board/cds/common/ft_board.c @@ -37,17 +37,24 @@ static void cds_pci_fixup(void *blob) map = ft_get_prop(blob, "/" OF_SOC "/pci@8000/interrupt-map", &len); - len /= sizeof(u32); + if (!map) + map = ft_get_prop(blob, "/" OF_PCI "/interrupt-map", &len); - slot = get_pci_slot(); + if (map) { + len /= sizeof(u32); - for (i=0;ibi_busfreq / 8) #define OF_STDOUT_PATH "/soc8541@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 6083715..4edc7fd 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -340,6 +340,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8548@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8548@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 1d1b7c9..c414bf0 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8555@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8555@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C -- cgit v1.1 From 5c7ea64bb74a850a2b2303f853a8270695ad8602 Mon Sep 17 00:00:00 2001 From: Dan Wilson Date: Fri, 19 Oct 2007 11:33:48 -0500 Subject: tsec driver should clear RHALT on startup This was causing problems for some people. Signed-off-by: Alain Gravel Signed-off-by: Dan Wilson Signed-off-by: Andy Fleming --- drivers/tsec.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tsec.c b/drivers/tsec.c index 4ff3339..7ba8f0c 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -803,6 +803,7 @@ static void startup_tsec(struct eth_device *dev) /* Tell the DMA it is clear to go */ regs->dmactrl |= DMACTRL_INIT_SETTINGS; regs->tstat = TSTAT_CLEAR_THALT; + regs->rstat = RSTAT_CLEAR_RHALT; regs->dmactrl &= ~(DMACTRL_GRS | DMACTRL_GTS); } -- cgit v1.1 From 1e701e701304b3c3a3768ca83dd2ab7b9e88c77d Mon Sep 17 00:00:00 2001 From: "urwithsughosh@gmail.com" Date: Mon, 24 Sep 2007 13:36:01 -0400 Subject: MSR overwrite fix Hello, This patch fixes the MSR overwrite in the start.S when moving out of the last 4K page. Signed-off-by: Sughosh Ganu --- cpu/mpc85xx/start.S | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index e5cabca..ada6ea5 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -218,6 +218,8 @@ _start_e500: bdnz 0b /* Clear and set up some registers. */ + li r0,0 + mtmsr r0 li r0,0x0000 lis r1,0xffff mtspr DEC,r0 /* prevent dec exceptions */ @@ -277,7 +279,6 @@ _start_e500: /* Jump out the last 4K page and continue to 'normal' start */ #ifdef CFG_RAMBOOT - bl 3f b _start_cont #else /* Calculate absolute address in FLASH and jump there */ @@ -286,15 +287,9 @@ _start_e500: ori r3,r3,CFG_MONITOR_BASE@l addi r3,r3,_start_cont - _start + _START_OFFSET mtlr r3 + blr #endif -3: li r0,0 - mtspr SRR1,r0 /* Keep things disabled for now */ - mflr r1 - mtspr SRR0,r1 - rfi - isync - .text .globl _start _start: -- cgit v1.1 From df90968b48fb34fa9072fab150db2ac89678f537 Mon Sep 17 00:00:00 2001 From: "urwithsughosh@gmail.com" Date: Mon, 24 Sep 2007 13:32:13 -0400 Subject: Setting MSR[DE] in do_reset Hello, This patch ensures the soft reset of the board for the 85xx boards by setting the MSR[DE] in the do_reset function. Signed-off-by: Sughosh Ganu --- cpu/mpc85xx/cpu.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 08e0468..bbc5444 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -163,7 +163,12 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) * Initiate hard reset in debug control register DBCR0 * Make sure MSR[DE] = 1 */ - unsigned long val; + unsigned long val, msr; + + msr = mfmsr (); + msr |= MSR_DE; + mtmsr (msr); + val = mfspr(DBCR0); val |= 0x70000000; mtspr(DBCR0,val); -- cgit v1.1 From e5f325fec5b48ae705c89522923ba5a2e37cd5c7 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Sun, 21 Oct 2007 10:55:36 +0900 Subject: [MIPS] u-boot.lds: Remove duplicated .sdata section Signed-off-by: Shinya Kuribayashi --- board/dbau1x00/u-boot.lds | 3 --- board/gth2/u-boot.lds | 3 --- board/incaip/u-boot.lds | 3 --- board/pb1x00/u-boot.lds | 3 --- board/purple/u-boot.lds | 3 --- board/tb0229/u-boot.lds | 3 --- examples/mips.lds | 3 --- 7 files changed, 21 deletions(-) diff --git a/board/dbau1x00/u-boot.lds b/board/dbau1x00/u-boot.lds index 10c9917..75a3af6 100644 --- a/board/dbau1x00/u-boot.lds +++ b/board/dbau1x00/u-boot.lds @@ -43,9 +43,6 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - _gp = ALIGN(16); __got_start = .; diff --git a/board/gth2/u-boot.lds b/board/gth2/u-boot.lds index 8ba0b6d..69c8c9d 100644 --- a/board/gth2/u-boot.lds +++ b/board/gth2/u-boot.lds @@ -43,9 +43,6 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - _gp = ALIGN(16); __got_start = .; diff --git a/board/incaip/u-boot.lds b/board/incaip/u-boot.lds index 10c9917..75a3af6 100644 --- a/board/incaip/u-boot.lds +++ b/board/incaip/u-boot.lds @@ -43,9 +43,6 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - _gp = ALIGN(16); __got_start = .; diff --git a/board/pb1x00/u-boot.lds b/board/pb1x00/u-boot.lds index a2d19a8..865be77 100644 --- a/board/pb1x00/u-boot.lds +++ b/board/pb1x00/u-boot.lds @@ -43,9 +43,6 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - _gp = ALIGN(16); __got_start = .; diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds index 1bdac1f..6b3783f 100644 --- a/board/purple/u-boot.lds +++ b/board/purple/u-boot.lds @@ -53,9 +53,6 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - _gp = ALIGN(16); __got_start = .; diff --git a/board/tb0229/u-boot.lds b/board/tb0229/u-boot.lds index 30a2bc5..26d8c81 100644 --- a/board/tb0229/u-boot.lds +++ b/board/tb0229/u-boot.lds @@ -43,9 +43,6 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - _gp = ALIGN(16); __got_start = .; diff --git a/examples/mips.lds b/examples/mips.lds index 9d9849b..6f31eb7 100644 --- a/examples/mips.lds +++ b/examples/mips.lds @@ -39,9 +39,6 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - _gp = ALIGN(16); __got_start = .; -- cgit v1.1 From cbf2323b5b8285ea01acba7bbb905a3162d9b021 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Sun, 21 Oct 2007 10:55:36 +0900 Subject: [MIPS] u-boot.lds: Fix __got_start and __got_end Ensure that __got_start points to top of the `.got', and __got_end points to bottom as well, so that we never fail to count num_got_entries. Signed-off-by: Shinya Kuribayashi --- board/dbau1x00/u-boot.lds | 8 +++++--- board/gth2/u-boot.lds | 8 +++++--- board/incaip/u-boot.lds | 8 +++++--- board/pb1x00/u-boot.lds | 8 +++++--- board/purple/u-boot.lds | 8 +++++--- board/tb0229/u-boot.lds | 8 +++++--- examples/mips.lds | 8 +++++--- 7 files changed, 35 insertions(+), 21 deletions(-) diff --git a/board/dbau1x00/u-boot.lds b/board/dbau1x00/u-boot.lds index 75a3af6..9c71ef7 100644 --- a/board/dbau1x00/u-boot.lds +++ b/board/dbau1x00/u-boot.lds @@ -45,9 +45,11 @@ SECTIONS _gp = ALIGN(16); - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/board/gth2/u-boot.lds b/board/gth2/u-boot.lds index 69c8c9d..0ab42db 100644 --- a/board/gth2/u-boot.lds +++ b/board/gth2/u-boot.lds @@ -45,9 +45,11 @@ SECTIONS _gp = ALIGN(16); - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/board/incaip/u-boot.lds b/board/incaip/u-boot.lds index 75a3af6..9c71ef7 100644 --- a/board/incaip/u-boot.lds +++ b/board/incaip/u-boot.lds @@ -45,9 +45,11 @@ SECTIONS _gp = ALIGN(16); - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/board/pb1x00/u-boot.lds b/board/pb1x00/u-boot.lds index 865be77..7329e6a 100644 --- a/board/pb1x00/u-boot.lds +++ b/board/pb1x00/u-boot.lds @@ -45,9 +45,11 @@ SECTIONS _gp = ALIGN(16); - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds index 6b3783f..aa51cbf 100644 --- a/board/purple/u-boot.lds +++ b/board/purple/u-boot.lds @@ -55,9 +55,11 @@ SECTIONS _gp = ALIGN(16); - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/board/tb0229/u-boot.lds b/board/tb0229/u-boot.lds index 26d8c81..148f5e6 100644 --- a/board/tb0229/u-boot.lds +++ b/board/tb0229/u-boot.lds @@ -45,9 +45,11 @@ SECTIONS _gp = ALIGN(16); - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/examples/mips.lds b/examples/mips.lds index 6f31eb7..3bd573c 100644 --- a/examples/mips.lds +++ b/examples/mips.lds @@ -41,9 +41,11 @@ SECTIONS _gp = ALIGN(16); - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } -- cgit v1.1 From 22069215eb7adf5a3888bf7c7784ea9d70a72cd0 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Sun, 21 Oct 2007 10:55:36 +0900 Subject: [MIPS] Fix $gp usage Now we load $gp with _GLOBAL_OFFSET_TABLE_, but this is incorrect use. As a general principle, we should use _gp for $gp. Thanks to linker script's help we fortunately have _gp which equals to _GLOBAL_OFFSET_TABLE_. But once _gp gets out of alignment, we will not be able to access to GOT entires, global variables and procedure entry points. The right thing to do is to use _gp. This patch also introduce a new symbol `.gpword _GLOBAL_OFFSET_TABLE_' which holds the offset from _gp. When updating GOT entries, we use this offset and _gp to calculate the final _GLOBAL_OFFSET_TABLE_. This patch is originally submitted by Vlad Lungu , then I made some change to leave over num_got_entries. Signed-off-by: Shinya Kuribayashi Cc: Vlad Lungu --- cpu/mips/start.S | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/cpu/mips/start.S b/cpu/mips/start.S index e91e213..074d01d 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -234,11 +234,11 @@ reset: li t0, CONF_CM_UNCACHED mtc0 t0, CP0_CONFIG - /* Initialize GOT pointer. + /* Initialize $gp. */ bal 1f nop - .word _GLOBAL_OFFSET_TABLE_ + .word _gp 1: move gp, ra lw t1, 0(ra) @@ -306,9 +306,9 @@ relocate_code: move t1, a2 /* - * Fix GOT pointer: + * Fix $gp: * - * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address + * New $gp = (Old $gp - CFG_MONITOR_BASE) + Destination Address */ move t6, gp sub gp, CFG_MONITOR_BASE @@ -341,15 +341,22 @@ relocate_code: j t0 nop + .gpword _GLOBAL_OFFSET_TABLE_ /* _GLOBAL_OFFSET_TABLE_ - _gp */ .word uboot_end_data .word uboot_end .word num_got_entries in_ram: - /* Now we want to update GOT. + /* + * Now we want to update GOT. + * + * GOT[0] is reserved. GOT[1] is also reserved for the dynamic object + * generated by GNU ld. Skip these reserved entries from relocation. */ lw t3, -4(t0) /* t3 <-- num_got_entries */ - addi t4, gp, 8 /* Skipping first two entries. */ + lw t4, -16(t0) /* t4 <-- (_GLOBAL_OFFSET_TABLE_ - _gp) */ + add t4, t4, gp /* t4 now holds _GLOBAL_OFFSET_TABLE_ */ + addi t4, t4, 8 /* Skipping first two entries. */ li t2, 2 1: lw t1, 0(t4) -- cgit v1.1 From eb700636db017d310edaeb559b13d82588560674 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Sun, 21 Oct 2007 10:55:37 +0900 Subject: [MIPS] u-boot.lds: Define _gp in a standard manner Signed-off-by: Shinya Kuribayashi --- board/dbau1x00/u-boot.lds | 3 ++- board/gth2/u-boot.lds | 3 ++- board/incaip/u-boot.lds | 3 ++- board/pb1x00/u-boot.lds | 3 ++- board/purple/u-boot.lds | 3 ++- board/tb0229/u-boot.lds | 3 ++- examples/mips.lds | 3 ++- 7 files changed, 14 insertions(+), 7 deletions(-) diff --git a/board/dbau1x00/u-boot.lds b/board/dbau1x00/u-boot.lds index 9c71ef7..9639b81 100644 --- a/board/dbau1x00/u-boot.lds +++ b/board/dbau1x00/u-boot.lds @@ -43,7 +43,8 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; .got : { __got_start = .; diff --git a/board/gth2/u-boot.lds b/board/gth2/u-boot.lds index 0ab42db..90432cb 100644 --- a/board/gth2/u-boot.lds +++ b/board/gth2/u-boot.lds @@ -43,7 +43,8 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; .got : { __got_start = .; diff --git a/board/incaip/u-boot.lds b/board/incaip/u-boot.lds index 9c71ef7..9639b81 100644 --- a/board/incaip/u-boot.lds +++ b/board/incaip/u-boot.lds @@ -43,7 +43,8 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; .got : { __got_start = .; diff --git a/board/pb1x00/u-boot.lds b/board/pb1x00/u-boot.lds index 7329e6a..363d974 100644 --- a/board/pb1x00/u-boot.lds +++ b/board/pb1x00/u-boot.lds @@ -43,7 +43,8 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; .got : { __got_start = .; diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds index aa51cbf..e7ec012 100644 --- a/board/purple/u-boot.lds +++ b/board/purple/u-boot.lds @@ -53,7 +53,8 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; .got : { __got_start = .; diff --git a/board/tb0229/u-boot.lds b/board/tb0229/u-boot.lds index 148f5e6..b2fa9f2 100644 --- a/board/tb0229/u-boot.lds +++ b/board/tb0229/u-boot.lds @@ -43,7 +43,8 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; .got : { __got_start = .; diff --git a/examples/mips.lds b/examples/mips.lds index 3bd573c..a770728 100644 --- a/examples/mips.lds +++ b/examples/mips.lds @@ -39,7 +39,8 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; .got : { __got_start = .; -- cgit v1.1 From 00101dd7a32d12f698150123e47e4b3420279f86 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Sun, 21 Oct 2007 21:30:42 +0900 Subject: [MIPS] Add PIC-related switches to PLATFORM_{CPP,LD}FLAGS and cleanup Signed-off-by: Shinya Kuribayashi --- cpu/mips/config.mk | 2 +- mips_config.mk | 25 +++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk index b29986e..487c4eb 100644 --- a/cpu/mips/config.mk +++ b/cpu/mips/config.mk @@ -35,6 +35,6 @@ else ENDIANNESS = -EB endif -MIPSFLAGS += $(ENDIANNESS) -mabicalls +MIPSFLAGS += $(ENDIANNESS) PLATFORM_CPPFLAGS += $(MIPSFLAGS) diff --git a/mips_config.mk b/mips_config.mk index d8aa5fa..67fb67d 100644 --- a/mips_config.mk +++ b/mips_config.mk @@ -22,3 +22,28 @@ # PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__ + +# +# From Linux arch/mips/Makefile +# +# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel +# code since it only slows down the whole thing. At some point we might make +# use of global pointer optimizations but their use of $28 conflicts with +# the current pointer optimization. +# +# The DECStation requires an ECOFF kernel for remote booting, other MIPS +# machines may also. Since BFD is incredibly buggy with respect to +# crossformat linking we rely on the elf2ecoff tool for format conversion. +# +# cflags-y += -G 0 -mno-abicalls -fno-pic -pipe +# cflags-y += -msoft-float +# LDFLAGS_vmlinux += -G 0 -static -n -nostdlib +# MODFLAGS += -mlong-calls +# + +# +# Meanwhile, U-Boot rely on PIC. We add proper switches explicitly. +# +PLATFORM_CPPFLAGS += -G 0 -mabicalls -fpic -pipe +PLATFORM_CPPFLAGS += -msoft-float +PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib -- cgit v1.1 From de9a738faa7c2f47286119c3bfebc3dfbfe7d86d Mon Sep 17 00:00:00 2001 From: Vlad Lungu Date: Sun, 21 Oct 2007 22:10:10 +0900 Subject: [MIPS] Fix UNCACHED_SDRAM PHYSADDR is for physical address, KSEG1ADDR is for uncached. Signed-off-by: Vlad Lungu Signed-off-by: Shinya Kuribayashi --- include/asm-mips/addrspace.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index b8214b1..0e6abd7 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -49,7 +49,7 @@ cannot access physical memory directly from core */ #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000) #else /* !CONFIG_AU1X00 */ -#define UNCACHED_SDRAM(a) PHYSADDR(a) +#define UNCACHED_SDRAM(a) KSEG1ADDR(a) #endif /* CONFIG_AU1X00 */ #endif /* __ASSEMBLY__ */ /* -- cgit v1.1 From 7a9348728ebda63cdbaacffd83099aa71d9d4c54 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 23 Oct 2007 10:22:16 +0100 Subject: Move PL01* serial drivers to drivers/serial and adjust Makefiles. --- drivers/Makefile | 2 +- drivers/serial/Makefile | 2 +- drivers/serial/serial_pl010.c | 171 ++++++++++++++++++++++++++++++++++++++++++ drivers/serial/serial_pl011.c | 161 +++++++++++++++++++++++++++++++++++++++ drivers/serial/serial_pl011.h | 137 +++++++++++++++++++++++++++++++++ drivers/serial_pl010.c | 171 ------------------------------------------ drivers/serial_pl011.c | 161 --------------------------------------- drivers/serial_pl011.h | 137 --------------------------------- 8 files changed, 471 insertions(+), 471 deletions(-) create mode 100644 drivers/serial/serial_pl010.c create mode 100644 drivers/serial/serial_pl011.c create mode 100644 drivers/serial/serial_pl011.h delete mode 100644 drivers/serial_pl010.c delete mode 100644 drivers/serial_pl011.c delete mode 100644 drivers/serial_pl011.h diff --git a/drivers/Makefile b/drivers/Makefile index 6bf05cc..1889698 100755 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -42,7 +42,7 @@ COBJS = 3c589.o 5701rls.o ali512x.o at45.o ata_piix.o atmel_usart.o \ s3c4510b_eth.o s3c4510b_uart.o \ sed13806.o sed156x.o \ serial.o serial_max3100.o \ - serial_pl010.o serial_pl011.o serial_xuartlite.o \ + serial_xuartlite.o \ sil680.o sl811_usb.o sm501.o smc91111.o smiLynxEM.o \ status_led.o sym53c8xx.o systemace.o ahci.o \ ti_pci1410a.o tigon3.o tsec.o \ diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 93c68dd..40f3d67 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libserial.a -COBJS := mcfuart.o +COBJS := mcfuart.o serial_pl010.o serial_pl011.o SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/serial/serial_pl010.c b/drivers/serial/serial_pl010.c new file mode 100644 index 0000000..417b6ae --- /dev/null +++ b/drivers/serial/serial_pl010.c @@ -0,0 +1,171 @@ +/* + * (C) Copyright 2000 + * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. + * + * (C) Copyright 2004 + * ARM Ltd. + * Philippe Robin, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */ +/* Should be fairly simple to make it work with the PL010 as well */ + +#include + +#ifdef CFG_PL010_SERIAL + +#include "serial_pl011.h" + +#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val)) +#define IO_READ(addr) (*(volatile unsigned int *)(addr)) + +/* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */ +#define CONSOLE_PORT CONFIG_CONS_INDEX +#define baudRate CONFIG_BAUDRATE +static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS; +#define NUM_PORTS (sizeof(port)/sizeof(port[0])) + + +static void pl010_putc (int portnum, char c); +static int pl010_getc (int portnum); +static int pl010_tstc (int portnum); + + +int serial_init (void) +{ + unsigned int divisor; + + /* + ** First, disable everything. + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0); + + /* + ** Set baud rate + ** + */ + switch (baudRate) { + case 9600: + divisor = UART_PL010_BAUD_9600; + break; + + case 19200: + divisor = UART_PL010_BAUD_9600; + break; + + case 38400: + divisor = UART_PL010_BAUD_38400; + break; + + case 57600: + divisor = UART_PL010_BAUD_57600; + break; + + case 115200: + divisor = UART_PL010_BAUD_115200; + break; + + default: + divisor = UART_PL010_BAUD_38400; + } + + IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM, + ((divisor & 0xf00) >> 8)); + IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff)); + + /* + ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled. + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH, + (UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN)); + + /* + ** Finally, enable the UART + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN)); + + return (0); +} + +void serial_putc (const char c) +{ + if (c == '\n') + pl010_putc (CONSOLE_PORT, '\r'); + + pl010_putc (CONSOLE_PORT, c); +} + +void serial_puts (const char *s) +{ + while (*s) { + serial_putc (*s++); + } +} + +int serial_getc (void) +{ + return pl010_getc (CONSOLE_PORT); +} + +int serial_tstc (void) +{ + return pl010_tstc (CONSOLE_PORT); +} + +void serial_setbrg (void) +{ +} + +static void pl010_putc (int portnum, char c) +{ + /* Wait until there is space in the FIFO */ + while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF); + + /* Send the character */ + IO_WRITE (port[portnum] + UART_PL01x_DR, c); +} + +static int pl010_getc (int portnum) +{ + unsigned int data; + + /* Wait until there is data in the FIFO */ + while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE); + + data = IO_READ (port[portnum] + UART_PL01x_DR); + + /* Check for an error flag */ + if (data & 0xFFFFFF00) { + /* Clear the error */ + IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF); + return -1; + } + + return (int) data; +} + +static int pl010_tstc (int portnum) +{ + return !(IO_READ (port[portnum] + UART_PL01x_FR) & + UART_PL01x_FR_RXFE); +} + +#endif diff --git a/drivers/serial/serial_pl011.c b/drivers/serial/serial_pl011.c new file mode 100644 index 0000000..4d35fe5 --- /dev/null +++ b/drivers/serial/serial_pl011.c @@ -0,0 +1,161 @@ +/* + * (C) Copyright 2000 + * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. + * + * (C) Copyright 2004 + * ARM Ltd. + * Philippe Robin, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */ +/* Should be fairly simple to make it work with the PL010 as well */ + +#include + +#ifdef CFG_PL011_SERIAL + +#include "serial_pl011.h" + +#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val)) +#define IO_READ(addr) (*(volatile unsigned int *)(addr)) + +/* + * IntegratorCP has two UARTs, use the first one, at 38400-8-N-1 + * Versatile PB has four UARTs. + */ + +#define CONSOLE_PORT CONFIG_CONS_INDEX +#define baudRate CONFIG_BAUDRATE +static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS; +#define NUM_PORTS (sizeof(port)/sizeof(port[0])) + +static void pl011_putc (int portnum, char c); +static int pl011_getc (int portnum); +static int pl011_tstc (int portnum); + + +int serial_init (void) +{ + unsigned int temp; + unsigned int divider; + unsigned int remainder; + unsigned int fraction; + + /* + ** First, disable everything. + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0); + + /* + ** Set baud rate + ** + ** IBRD = UART_CLK / (16 * BAUD_RATE) + ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE)) + */ + temp = 16 * baudRate; + divider = CONFIG_PL011_CLOCK / temp; + remainder = CONFIG_PL011_CLOCK % temp; + temp = (8 * remainder) / baudRate; + fraction = (temp >> 1) + (temp & 1); + + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider); + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction); + + /* + ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled. + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH, + (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN)); + + /* + ** Finally, enable the UART + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, + (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | + UART_PL011_CR_RXE)); + + return 0; +} + +void serial_putc (const char c) +{ + if (c == '\n') + pl011_putc (CONSOLE_PORT, '\r'); + + pl011_putc (CONSOLE_PORT, c); +} + +void serial_puts (const char *s) +{ + while (*s) { + serial_putc (*s++); + } +} + +int serial_getc (void) +{ + return pl011_getc (CONSOLE_PORT); +} + +int serial_tstc (void) +{ + return pl011_tstc (CONSOLE_PORT); +} + +void serial_setbrg (void) +{ +} + +static void pl011_putc (int portnum, char c) +{ + /* Wait until there is space in the FIFO */ + while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF); + + /* Send the character */ + IO_WRITE (port[portnum] + UART_PL01x_DR, c); +} + +static int pl011_getc (int portnum) +{ + unsigned int data; + + /* Wait until there is data in the FIFO */ + while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE); + + data = IO_READ (port[portnum] + UART_PL01x_DR); + + /* Check for an error flag */ + if (data & 0xFFFFFF00) { + /* Clear the error */ + IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF); + return -1; + } + + return (int) data; +} + +static int pl011_tstc (int portnum) +{ + return !(IO_READ (port[portnum] + UART_PL01x_FR) & + UART_PL01x_FR_RXFE); +} + +#endif diff --git a/drivers/serial/serial_pl011.h b/drivers/serial/serial_pl011.h new file mode 100644 index 0000000..5f20fdd --- /dev/null +++ b/drivers/serial/serial_pl011.h @@ -0,0 +1,137 @@ +/* + * (C) Copyright 2003, 2004 + * ARM Ltd. + * Philippe Robin, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * ARM PrimeCell UART's (PL010 & PL011) + * ------------------------------------ + * + * Definitions common to both PL010 & PL011 + * + */ +#define UART_PL01x_DR 0x00 /* Data read or written from the interface. */ +#define UART_PL01x_RSR 0x04 /* Receive status register (Read). */ +#define UART_PL01x_ECR 0x04 /* Error clear register (Write). */ +#define UART_PL01x_FR 0x18 /* Flag register (Read only). */ + +#define UART_PL01x_RSR_OE 0x08 +#define UART_PL01x_RSR_BE 0x04 +#define UART_PL01x_RSR_PE 0x02 +#define UART_PL01x_RSR_FE 0x01 + +#define UART_PL01x_FR_TXFE 0x80 +#define UART_PL01x_FR_RXFF 0x40 +#define UART_PL01x_FR_TXFF 0x20 +#define UART_PL01x_FR_RXFE 0x10 +#define UART_PL01x_FR_BUSY 0x08 +#define UART_PL01x_FR_TMSK (UART_PL01x_FR_TXFF + UART_PL01x_FR_BUSY) + +/* + * PL010 definitions + * + */ +#define UART_PL010_LCRH 0x08 /* Line control register, high byte. */ +#define UART_PL010_LCRM 0x0C /* Line control register, middle byte. */ +#define UART_PL010_LCRL 0x10 /* Line control register, low byte. */ +#define UART_PL010_CR 0x14 /* Control register. */ +#define UART_PL010_IIR 0x1C /* Interrupt indentification register (Read). */ +#define UART_PL010_ICR 0x1C /* Interrupt clear register (Write). */ +#define UART_PL010_ILPR 0x20 /* IrDA low power counter register. */ + +#define UART_PL010_CR_LPE (1 << 7) +#define UART_PL010_CR_RTIE (1 << 6) +#define UART_PL010_CR_TIE (1 << 5) +#define UART_PL010_CR_RIE (1 << 4) +#define UART_PL010_CR_MSIE (1 << 3) +#define UART_PL010_CR_IIRLP (1 << 2) +#define UART_PL010_CR_SIREN (1 << 1) +#define UART_PL010_CR_UARTEN (1 << 0) + +#define UART_PL010_LCRH_WLEN_8 (3 << 5) +#define UART_PL010_LCRH_WLEN_7 (2 << 5) +#define UART_PL010_LCRH_WLEN_6 (1 << 5) +#define UART_PL010_LCRH_WLEN_5 (0 << 5) +#define UART_PL010_LCRH_FEN (1 << 4) +#define UART_PL010_LCRH_STP2 (1 << 3) +#define UART_PL010_LCRH_EPS (1 << 2) +#define UART_PL010_LCRH_PEN (1 << 1) +#define UART_PL010_LCRH_BRK (1 << 0) + + +#define UART_PL010_BAUD_460800 1 +#define UART_PL010_BAUD_230400 3 +#define UART_PL010_BAUD_115200 7 +#define UART_PL010_BAUD_57600 15 +#define UART_PL010_BAUD_38400 23 +#define UART_PL010_BAUD_19200 47 +#define UART_PL010_BAUD_14400 63 +#define UART_PL010_BAUD_9600 95 +#define UART_PL010_BAUD_4800 191 +#define UART_PL010_BAUD_2400 383 +#define UART_PL010_BAUD_1200 767 +/* + * PL011 definitions + * + */ +#define UART_PL011_IBRD 0x24 +#define UART_PL011_FBRD 0x28 +#define UART_PL011_LCRH 0x2C +#define UART_PL011_CR 0x30 +#define UART_PL011_IMSC 0x38 +#define UART_PL011_PERIPH_ID0 0xFE0 + +#define UART_PL011_LCRH_SPS (1 << 7) +#define UART_PL011_LCRH_WLEN_8 (3 << 5) +#define UART_PL011_LCRH_WLEN_7 (2 << 5) +#define UART_PL011_LCRH_WLEN_6 (1 << 5) +#define UART_PL011_LCRH_WLEN_5 (0 << 5) +#define UART_PL011_LCRH_FEN (1 << 4) +#define UART_PL011_LCRH_STP2 (1 << 3) +#define UART_PL011_LCRH_EPS (1 << 2) +#define UART_PL011_LCRH_PEN (1 << 1) +#define UART_PL011_LCRH_BRK (1 << 0) + +#define UART_PL011_CR_CTSEN (1 << 15) +#define UART_PL011_CR_RTSEN (1 << 14) +#define UART_PL011_CR_OUT2 (1 << 13) +#define UART_PL011_CR_OUT1 (1 << 12) +#define UART_PL011_CR_RTS (1 << 11) +#define UART_PL011_CR_DTR (1 << 10) +#define UART_PL011_CR_RXE (1 << 9) +#define UART_PL011_CR_TXE (1 << 8) +#define UART_PL011_CR_LPE (1 << 7) +#define UART_PL011_CR_IIRLP (1 << 2) +#define UART_PL011_CR_SIREN (1 << 1) +#define UART_PL011_CR_UARTEN (1 << 0) + +#define UART_PL011_IMSC_OEIM (1 << 10) +#define UART_PL011_IMSC_BEIM (1 << 9) +#define UART_PL011_IMSC_PEIM (1 << 8) +#define UART_PL011_IMSC_FEIM (1 << 7) +#define UART_PL011_IMSC_RTIM (1 << 6) +#define UART_PL011_IMSC_TXIM (1 << 5) +#define UART_PL011_IMSC_RXIM (1 << 4) +#define UART_PL011_IMSC_DSRMIM (1 << 3) +#define UART_PL011_IMSC_DCDMIM (1 << 2) +#define UART_PL011_IMSC_CTSMIM (1 << 1) +#define UART_PL011_IMSC_RIMIM (1 << 0) diff --git a/drivers/serial_pl010.c b/drivers/serial_pl010.c deleted file mode 100644 index 417b6ae..0000000 --- a/drivers/serial_pl010.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * (C) Copyright 2000 - * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. - * - * (C) Copyright 2004 - * ARM Ltd. - * Philippe Robin, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */ -/* Should be fairly simple to make it work with the PL010 as well */ - -#include - -#ifdef CFG_PL010_SERIAL - -#include "serial_pl011.h" - -#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val)) -#define IO_READ(addr) (*(volatile unsigned int *)(addr)) - -/* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */ -#define CONSOLE_PORT CONFIG_CONS_INDEX -#define baudRate CONFIG_BAUDRATE -static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS; -#define NUM_PORTS (sizeof(port)/sizeof(port[0])) - - -static void pl010_putc (int portnum, char c); -static int pl010_getc (int portnum); -static int pl010_tstc (int portnum); - - -int serial_init (void) -{ - unsigned int divisor; - - /* - ** First, disable everything. - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0); - - /* - ** Set baud rate - ** - */ - switch (baudRate) { - case 9600: - divisor = UART_PL010_BAUD_9600; - break; - - case 19200: - divisor = UART_PL010_BAUD_9600; - break; - - case 38400: - divisor = UART_PL010_BAUD_38400; - break; - - case 57600: - divisor = UART_PL010_BAUD_57600; - break; - - case 115200: - divisor = UART_PL010_BAUD_115200; - break; - - default: - divisor = UART_PL010_BAUD_38400; - } - - IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM, - ((divisor & 0xf00) >> 8)); - IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff)); - - /* - ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled. - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH, - (UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN)); - - /* - ** Finally, enable the UART - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN)); - - return (0); -} - -void serial_putc (const char c) -{ - if (c == '\n') - pl010_putc (CONSOLE_PORT, '\r'); - - pl010_putc (CONSOLE_PORT, c); -} - -void serial_puts (const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - -int serial_getc (void) -{ - return pl010_getc (CONSOLE_PORT); -} - -int serial_tstc (void) -{ - return pl010_tstc (CONSOLE_PORT); -} - -void serial_setbrg (void) -{ -} - -static void pl010_putc (int portnum, char c) -{ - /* Wait until there is space in the FIFO */ - while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF); - - /* Send the character */ - IO_WRITE (port[portnum] + UART_PL01x_DR, c); -} - -static int pl010_getc (int portnum) -{ - unsigned int data; - - /* Wait until there is data in the FIFO */ - while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE); - - data = IO_READ (port[portnum] + UART_PL01x_DR); - - /* Check for an error flag */ - if (data & 0xFFFFFF00) { - /* Clear the error */ - IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF); - return -1; - } - - return (int) data; -} - -static int pl010_tstc (int portnum) -{ - return !(IO_READ (port[portnum] + UART_PL01x_FR) & - UART_PL01x_FR_RXFE); -} - -#endif diff --git a/drivers/serial_pl011.c b/drivers/serial_pl011.c deleted file mode 100644 index 4d35fe5..0000000 --- a/drivers/serial_pl011.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * (C) Copyright 2000 - * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. - * - * (C) Copyright 2004 - * ARM Ltd. - * Philippe Robin, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */ -/* Should be fairly simple to make it work with the PL010 as well */ - -#include - -#ifdef CFG_PL011_SERIAL - -#include "serial_pl011.h" - -#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val)) -#define IO_READ(addr) (*(volatile unsigned int *)(addr)) - -/* - * IntegratorCP has two UARTs, use the first one, at 38400-8-N-1 - * Versatile PB has four UARTs. - */ - -#define CONSOLE_PORT CONFIG_CONS_INDEX -#define baudRate CONFIG_BAUDRATE -static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS; -#define NUM_PORTS (sizeof(port)/sizeof(port[0])) - -static void pl011_putc (int portnum, char c); -static int pl011_getc (int portnum); -static int pl011_tstc (int portnum); - - -int serial_init (void) -{ - unsigned int temp; - unsigned int divider; - unsigned int remainder; - unsigned int fraction; - - /* - ** First, disable everything. - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0); - - /* - ** Set baud rate - ** - ** IBRD = UART_CLK / (16 * BAUD_RATE) - ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE)) - */ - temp = 16 * baudRate; - divider = CONFIG_PL011_CLOCK / temp; - remainder = CONFIG_PL011_CLOCK % temp; - temp = (8 * remainder) / baudRate; - fraction = (temp >> 1) + (temp & 1); - - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider); - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction); - - /* - ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled. - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH, - (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN)); - - /* - ** Finally, enable the UART - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, - (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | - UART_PL011_CR_RXE)); - - return 0; -} - -void serial_putc (const char c) -{ - if (c == '\n') - pl011_putc (CONSOLE_PORT, '\r'); - - pl011_putc (CONSOLE_PORT, c); -} - -void serial_puts (const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - -int serial_getc (void) -{ - return pl011_getc (CONSOLE_PORT); -} - -int serial_tstc (void) -{ - return pl011_tstc (CONSOLE_PORT); -} - -void serial_setbrg (void) -{ -} - -static void pl011_putc (int portnum, char c) -{ - /* Wait until there is space in the FIFO */ - while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF); - - /* Send the character */ - IO_WRITE (port[portnum] + UART_PL01x_DR, c); -} - -static int pl011_getc (int portnum) -{ - unsigned int data; - - /* Wait until there is data in the FIFO */ - while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE); - - data = IO_READ (port[portnum] + UART_PL01x_DR); - - /* Check for an error flag */ - if (data & 0xFFFFFF00) { - /* Clear the error */ - IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF); - return -1; - } - - return (int) data; -} - -static int pl011_tstc (int portnum) -{ - return !(IO_READ (port[portnum] + UART_PL01x_FR) & - UART_PL01x_FR_RXFE); -} - -#endif diff --git a/drivers/serial_pl011.h b/drivers/serial_pl011.h deleted file mode 100644 index 5f20fdd..0000000 --- a/drivers/serial_pl011.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * (C) Copyright 2003, 2004 - * ARM Ltd. - * Philippe Robin, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * ARM PrimeCell UART's (PL010 & PL011) - * ------------------------------------ - * - * Definitions common to both PL010 & PL011 - * - */ -#define UART_PL01x_DR 0x00 /* Data read or written from the interface. */ -#define UART_PL01x_RSR 0x04 /* Receive status register (Read). */ -#define UART_PL01x_ECR 0x04 /* Error clear register (Write). */ -#define UART_PL01x_FR 0x18 /* Flag register (Read only). */ - -#define UART_PL01x_RSR_OE 0x08 -#define UART_PL01x_RSR_BE 0x04 -#define UART_PL01x_RSR_PE 0x02 -#define UART_PL01x_RSR_FE 0x01 - -#define UART_PL01x_FR_TXFE 0x80 -#define UART_PL01x_FR_RXFF 0x40 -#define UART_PL01x_FR_TXFF 0x20 -#define UART_PL01x_FR_RXFE 0x10 -#define UART_PL01x_FR_BUSY 0x08 -#define UART_PL01x_FR_TMSK (UART_PL01x_FR_TXFF + UART_PL01x_FR_BUSY) - -/* - * PL010 definitions - * - */ -#define UART_PL010_LCRH 0x08 /* Line control register, high byte. */ -#define UART_PL010_LCRM 0x0C /* Line control register, middle byte. */ -#define UART_PL010_LCRL 0x10 /* Line control register, low byte. */ -#define UART_PL010_CR 0x14 /* Control register. */ -#define UART_PL010_IIR 0x1C /* Interrupt indentification register (Read). */ -#define UART_PL010_ICR 0x1C /* Interrupt clear register (Write). */ -#define UART_PL010_ILPR 0x20 /* IrDA low power counter register. */ - -#define UART_PL010_CR_LPE (1 << 7) -#define UART_PL010_CR_RTIE (1 << 6) -#define UART_PL010_CR_TIE (1 << 5) -#define UART_PL010_CR_RIE (1 << 4) -#define UART_PL010_CR_MSIE (1 << 3) -#define UART_PL010_CR_IIRLP (1 << 2) -#define UART_PL010_CR_SIREN (1 << 1) -#define UART_PL010_CR_UARTEN (1 << 0) - -#define UART_PL010_LCRH_WLEN_8 (3 << 5) -#define UART_PL010_LCRH_WLEN_7 (2 << 5) -#define UART_PL010_LCRH_WLEN_6 (1 << 5) -#define UART_PL010_LCRH_WLEN_5 (0 << 5) -#define UART_PL010_LCRH_FEN (1 << 4) -#define UART_PL010_LCRH_STP2 (1 << 3) -#define UART_PL010_LCRH_EPS (1 << 2) -#define UART_PL010_LCRH_PEN (1 << 1) -#define UART_PL010_LCRH_BRK (1 << 0) - - -#define UART_PL010_BAUD_460800 1 -#define UART_PL010_BAUD_230400 3 -#define UART_PL010_BAUD_115200 7 -#define UART_PL010_BAUD_57600 15 -#define UART_PL010_BAUD_38400 23 -#define UART_PL010_BAUD_19200 47 -#define UART_PL010_BAUD_14400 63 -#define UART_PL010_BAUD_9600 95 -#define UART_PL010_BAUD_4800 191 -#define UART_PL010_BAUD_2400 383 -#define UART_PL010_BAUD_1200 767 -/* - * PL011 definitions - * - */ -#define UART_PL011_IBRD 0x24 -#define UART_PL011_FBRD 0x28 -#define UART_PL011_LCRH 0x2C -#define UART_PL011_CR 0x30 -#define UART_PL011_IMSC 0x38 -#define UART_PL011_PERIPH_ID0 0xFE0 - -#define UART_PL011_LCRH_SPS (1 << 7) -#define UART_PL011_LCRH_WLEN_8 (3 << 5) -#define UART_PL011_LCRH_WLEN_7 (2 << 5) -#define UART_PL011_LCRH_WLEN_6 (1 << 5) -#define UART_PL011_LCRH_WLEN_5 (0 << 5) -#define UART_PL011_LCRH_FEN (1 << 4) -#define UART_PL011_LCRH_STP2 (1 << 3) -#define UART_PL011_LCRH_EPS (1 << 2) -#define UART_PL011_LCRH_PEN (1 << 1) -#define UART_PL011_LCRH_BRK (1 << 0) - -#define UART_PL011_CR_CTSEN (1 << 15) -#define UART_PL011_CR_RTSEN (1 << 14) -#define UART_PL011_CR_OUT2 (1 << 13) -#define UART_PL011_CR_OUT1 (1 << 12) -#define UART_PL011_CR_RTS (1 << 11) -#define UART_PL011_CR_DTR (1 << 10) -#define UART_PL011_CR_RXE (1 << 9) -#define UART_PL011_CR_TXE (1 << 8) -#define UART_PL011_CR_LPE (1 << 7) -#define UART_PL011_CR_IIRLP (1 << 2) -#define UART_PL011_CR_SIREN (1 << 1) -#define UART_PL011_CR_UARTEN (1 << 0) - -#define UART_PL011_IMSC_OEIM (1 << 10) -#define UART_PL011_IMSC_BEIM (1 << 9) -#define UART_PL011_IMSC_PEIM (1 << 8) -#define UART_PL011_IMSC_FEIM (1 << 7) -#define UART_PL011_IMSC_RTIM (1 << 6) -#define UART_PL011_IMSC_TXIM (1 << 5) -#define UART_PL011_IMSC_RXIM (1 << 4) -#define UART_PL011_IMSC_DSRMIM (1 << 3) -#define UART_PL011_IMSC_DCDMIM (1 << 2) -#define UART_PL011_IMSC_CTSMIM (1 << 1) -#define UART_PL011_IMSC_RIMIM (1 << 0) -- cgit v1.1 From be4a87f11e297a5cededbf7dd71c0248f3874acd Mon Sep 17 00:00:00 2001 From: Martin Krause Date: Wed, 24 Oct 2007 08:41:27 +0200 Subject: TQM5200S: fix commands for STK52xx base board because of missing SM501 grafic controller Some commands for the STK52xx base board try to access the SM501 grafic controller. But the TQM5200S has no grafic controller (only the TQM5200 and the TQM5200B have). This patch deactivates the commands accessing the SM501 for the TQM5200S. Signed-off-by: Martin Krause Signed-off-by: Grant Likely --- board/tqm5200/cmd_stk52xx.c | 17 ++++++++++------- board/tqm5200/tqm5200.c | 2 ++ 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/board/tqm5200/cmd_stk52xx.c b/board/tqm5200/cmd_stk52xx.c index b746679..27a6c41 100644 --- a/board/tqm5200/cmd_stk52xx.c +++ b/board/tqm5200/cmd_stk52xx.c @@ -561,7 +561,7 @@ void led_init(void) gpt->gpt6.emsr |= 0x00000024; gpt->gpt7.emsr |= 0x00000024; - +#ifndef CONFIG_TQM5200S /* enable SM501 GPIO control (in both power modes) */ *(vu_long *) (SM501_MMIO_BASE+SM501_POWER_MODE0_GATE) |= POWER_MODE_GATE_GPIO_PWM_I2C; @@ -574,6 +574,7 @@ void led_init(void) /* configure SM501 gpio pins 48-51 as output */ *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_DIR_HIGH) |= (0xF << 16); +#endif /* !CONFIG_TQM5200S */ } /* @@ -650,7 +651,7 @@ int do_led(char *argv[]) gpt->gpt7.emsr &= ~(1 << 4); } break; - +#ifndef CONFIG_TQM5200S case 24: if (strcmp (argv[3], "on") == 0) { *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |= @@ -730,7 +731,7 @@ int do_led(char *argv[]) ~(0x1 << 19); } break; - +#endif /* !CONFIG_TQM5200S */ default: printf ("%s: invalid led number %s\n", __FUNCTION__, argv[2]); return 1; @@ -1110,7 +1111,7 @@ int do_rs232(char *argv[]) return error_status; } -#ifndef CONFIG_FO300 +#if !defined(CONFIG_FO300) && !defined(CONFIG_TQM5200S) static void sm501_backlight (unsigned int state) { if (state == BL_ON) { @@ -1120,7 +1121,7 @@ static void sm501_backlight (unsigned int state) *(vu_long *)(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) &= ~((1 << 26) | (1 << 27)); } -#endif +#endif /* !CONFIG_FO300 & !CONFIG_TQM5200S */ int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -1160,7 +1161,7 @@ int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) else printf ("Error\n"); return rcode; -#ifndef CONFIG_FO300 +#if !defined(CONFIG_FO300) && !defined(CONFIG_TQM5200S) } else if (strncmp (argv[1], "backlight", 4) == 0) { if (strncmp (argv[2], "on", 2) == 0) { sm501_backlight (BL_ON); @@ -1170,7 +1171,7 @@ int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) sm501_backlight (BL_OFF); return 0; } -#endif +#endif /* !CONFIG_FO300 & !CONFIG_TQM5200S */ } break; @@ -1228,8 +1229,10 @@ U_BOOT_CMD( " - loopback plug for X83 required\n" "fkt rs232 number\n" " - loopback plug(s) for X2 required\n" +#ifndef CONFIG_TQM5200S "fkt backlight on/off\n" " - switch backlight on or off\n" +#endif /* !CONFIG_TQM5200S */ ); #elif defined(CONFIG_FO300) U_BOOT_CMD( diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c index 29d6f00..d10cb59 100644 --- a/board/tqm5200/tqm5200.c +++ b/board/tqm5200/tqm5200.c @@ -543,6 +543,7 @@ int last_stage_init (void) __asm__ volatile ("sync"); } +#ifndef CONFIG_TQM5200S /* The TQM5200S has no SM501 grafic controller */ /* * Check for Grafic Controller */ @@ -586,6 +587,7 @@ int last_stage_init (void) #endif return 0; +#endif /* !CONFIG_TQM5200S */ } #ifdef CONFIG_VIDEO_SM501 -- cgit v1.1 From 1a0ce20aa4cb4e3068da04e7290ee9986fd0b834 Mon Sep 17 00:00:00 2001 From: Martin Krause Date: Wed, 24 Oct 2007 08:42:25 +0200 Subject: TQM5200: fix spurious characters on second serial interface With this patch PSC3 is configured as UART. This is done, because if the pins of PSC3 are not configured at all (-> all pins are GPI), due to crosstalk, spurious characters may be send over the RX232_2_TXD signal line. Signed-off-by: Martin Krause Signed-off-by: Grant Likely --- include/configs/TQM5200.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index d553404..c3f16f5 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -547,7 +547,7 @@ # if defined (CONFIG_TQM5200_REV100) # error TQM5200 REV100 not supported on STK52XX REV200 or above # else/* TQM5200 REV200 and above */ -# define CFG_GPS_PORT_CONFIG 0x91500004 +# define CFG_GPS_PORT_CONFIG 0x91500404 # endif # endif #elif defined (CONFIG_FO300) -- cgit v1.1 From 2acefa72ee0026f862ab65597ca687428f63a973 Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:09:17 -0500 Subject: ColdFire 5282: Fix external flash boot and return dramsize Signed-off-by: TsiChungLiew --- board/m5282evb/m5282evb.c | 1 + cpu/mcf52x2/start.S | 6 +++++- include/configs/M5282EVB.h | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/board/m5282evb/m5282evb.c b/board/m5282evb/m5282evb.c index 243d6a4..7d6d1d6 100644 --- a/board/m5282evb/m5282evb.c +++ b/board/m5282evb/m5282evb.c @@ -89,4 +89,5 @@ long int initdram (int board_type) /* Write to the SDRAM Mode Register */ *(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xA5A59696; } + return dramsize; } diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index 686e2a5..260a09a 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -58,7 +58,7 @@ _vectors: .long 0x00000000 /* Flash offset is 0 until we setup CS0 */ #if defined(CONFIG_R5200) .long 0x400 -#elif defined(CONFIG_M5282) +#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) .long _start - TEXT_BASE #else .long _START @@ -177,7 +177,11 @@ _after_flashbar_copy: * therefore no VBR to set */ #if !defined(CONFIG_MONITOR_IS_IN_RAM) +#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) + move.l #CFG_INT_FLASH_BASE, %d0 +#else move.l #CFG_FLASH_BASE, %d0 +#endif movec %d0, %VBR #endif diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 3c17c1e..7bb9f60 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -163,7 +163,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CFG_FLASH_BASE 0xffe00000 #define CFG_INT_FLASH_BASE 0xf0000000 #define CFG_INT_FLASH_ENABLE 0x21 -- cgit v1.1 From 95e9f2c212a65610b2e59a5c00d0113383a4da0b Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:10:23 -0500 Subject: ColdFire 5253: Assign correct SDRAM size Signed-off-by: TsiChungLiew --- include/configs/M5253EVBE.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index 48170e7..f5e1b64 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -146,7 +146,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ #ifdef CONFIG_MONITOR_IS_IN_RAM #define CFG_MONITOR_BASE 0x20000 -- cgit v1.1 From c67e12e705b204cfe914e3e3e693d69a445dcabf Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:12:36 -0500 Subject: ColdFire 5329: Assign correct SDRAM size and fix cache Signed-off-by: TsiChungLiew --- cpu/mcf532x/start.S | 4 ++-- include/configs/M5329EVB.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S index 5cc1c87..61be2ea 100644 --- a/cpu/mcf532x/start.S +++ b/cpu/mcf532x/start.S @@ -131,7 +131,7 @@ _start: movec %d0, %VBR move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0 - movec %d0, %RAMBAR0 + movec %d0, %RAMBAR1 /* invalidate and disable cache */ move.l #0x01000000, %d0 /* Invalidate cache cmd */ @@ -268,7 +268,7 @@ _int_handler: icache_enable: move.l #0x01000000, %d0 /* Invalidate cache cmd */ movec %d0, %CACR /* Invalidate cache */ - move.l #(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0 + move.l #(CFG_SDRAM_BASE + 0x1c000), %d0 movec %d0, %ACR0 /* Enable cache */ move.l #0x80000200, %d0 /* Setup cache mask */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d3b1605..47d74a3 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -175,7 +175,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x40000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 32 /* SDRAM size in MB */ #define CFG_SDRAM_CFG1 0x53722730 #define CFG_SDRAM_CFG2 0x56670000 #define CFG_SDRAM_CTRL 0xE1092000 -- cgit v1.1 From 688e8eb414ac111cca7ce60bdf30e805ab9a7bcb Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:14:00 -0500 Subject: ColdFire: Fix build error when CONFIG_WATCHDOG is defined Signed-off-by: TsiChungLiew --- lib_m68k/m68k_linux.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lib_m68k/m68k_linux.c b/lib_m68k/m68k_linux.c index bea9744..cc974c2 100644 --- a/lib_m68k/m68k_linux.c +++ b/lib_m68k/m68k_linux.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -36,6 +37,8 @@ DECLARE_GLOBAL_DATA_PTR; #define LINUX_MAX_ENVS 256 #define LINUX_MAX_ARGS 256 +#define CHUNKSZ (64 * 1024) + #ifdef CONFIG_SHOW_BOOT_PROGRESS # include # define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) -- cgit v1.1 From e8ee8f3ade2a06c1893dd5e68f223070d650c7ed Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:16:22 -0500 Subject: ColdFire 54455: Fix correct boot location for atmel and intel Signed-off-by: TsiChungLiew --- Makefile | 4 ++++ board/freescale/m54455evb/config.mk | 4 +++- include/configs/M54455EVB.h | 36 ++++++++++++++++++++---------------- 3 files changed, 27 insertions(+), 17 deletions(-) diff --git a/Makefile b/Makefile index ce7b07f..850c68e 100644 --- a/Makefile +++ b/Makefile @@ -1733,9 +1733,13 @@ M54455EVB_i66_config : unconfig >include/config.h ; \ if [ "$${FLASH}" == "INTEL" ] ; then \ echo "#undef CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \ + echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ + cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \ echo "... with INTEL boot..." ; \ else \ echo "#define CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \ + echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ + cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \ echo "... with ATMEL boot..." ; \ fi; \ echo "#define CFG_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \ diff --git a/board/freescale/m54455evb/config.mk b/board/freescale/m54455evb/config.mk index ce014ed..b42fcc9 100644 --- a/board/freescale/m54455evb/config.mk +++ b/board/freescale/m54455evb/config.mk @@ -22,4 +22,6 @@ # MA 02111-1307 USA # -TEXT_BASE = 0 +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 6f4859c..ba050cb 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -27,8 +27,8 @@ * board/config.h - configuration options, board specific */ -#ifndef _JAMICA54455_H -#define _JAMICA54455_H +#ifndef _M54455EVB_H +#define _M54455EVB_H /* * High Level Configuration Options @@ -75,7 +75,7 @@ #define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_NET -#define CONFIG_CMD_PCI +#undef CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO @@ -129,8 +129,8 @@ "u-boot=u-boot.bin\0" \ "load=tftp ${loadaddr) ${u-boot}\0" \ "upd=run load; run prog\0" \ - "prog=prot off 0 2ffff;" \ - "era 0 2ffff;" \ + "prog=prot off 4000000 402ffff;" \ + "era 4000000 402ffff;" \ "cp.b ${loadaddr} 0 ${filesize};" \ "save\0" \ "" @@ -174,6 +174,7 @@ #define CFG_IMMR CFG_MBAR /* PCI */ +#ifdef CONFIG_CMD_PCI #define CONFIG_PCI 1 #define CFG_PCI_MEM_BUS 0xA0000000 @@ -187,6 +188,7 @@ #define CFG_PCI_CFG_BUS 0xB0000000 #define CFG_PCI_CFG_PHYS CFG_PCI_CFG_BUS #define CFG_PCI_CFG_SIZE 0x01000000 +#endif /* FPGA - Spartan 2 */ /* experiment @@ -268,8 +270,6 @@ /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash */ -#define CFG_ENV_OFFSET 0x4000 -#define CFG_ENV_SECT_SIZE 0x2000 #define CFG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_OVERWRITE 1 #undef CFG_ENV_IS_EMBEDDED @@ -278,13 +278,17 @@ * FLASH organization */ #ifdef CFG_ATMEL_BOOT -# define CFG_FLASH_BASE 0 +# define CFG_FLASH_BASE CFG_CS0_BASE # define CFG_FLASH0_BASE CFG_CS0_BASE # define CFG_FLASH1_BASE CFG_CS1_BASE +# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000) +# define CFG_ENV_SECT_SIZE 0x2000 #else # define CFG_FLASH_BASE CFG_FLASH0_BASE # define CFG_FLASH0_BASE CFG_CS1_BASE # define CFG_FLASH1_BASE CFG_CS0_BASE +# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000) +# define CFG_ENV_SECT_SIZE 0x20000 #endif /* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system @@ -328,9 +332,9 @@ * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. */ #ifdef CFG_ATMEL_BOOT -# define CONFIG_JFFS2_DEV "nor0" +# define CONFIG_JFFS2_DEV "nor1" # define CONFIG_JFFS2_PART_SIZE 0x01000000 -# define CONFIG_JFFS2_PART_OFFSET CFG_FLASH1_BASE +# define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH1_BASE + 0x500000) #else # define CONFIG_JFFS2_DEV "nor0" # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x500000) @@ -356,20 +360,20 @@ #ifdef CFG_ATMEL_BOOT /* Atmel Flash */ -#define CFG_CS0_BASE 0 +#define CFG_CS0_BASE 0x04000000 #define CFG_CS0_MASK 0x00070001 #define CFG_CS0_CTRL 0x00001140 /* Intel Flash */ -#define CFG_CS1_BASE 0x04000000 +#define CFG_CS1_BASE 0x00000000 #define CFG_CS1_MASK 0x01FF0001 -#define CFG_CS1_CTRL 0x003F3D60 +#define CFG_CS1_CTRL 0x00000D60 #define CFG_ATMEL_BASE CFG_CS0_BASE #else /* Intel Flash */ -#define CFG_CS0_BASE 0 +#define CFG_CS0_BASE 0x00000000 #define CFG_CS0_MASK 0x01FF0001 -#define CFG_CS0_CTRL 0x003F3D60 +#define CFG_CS0_CTRL 0x00000D60 /* Atmel Flash */ #define CFG_CS1_BASE 0x04000000 #define CFG_CS1_MASK 0x00070001 @@ -388,4 +392,4 @@ #define CFG_CS3_MASK 0x00070001 #define CFG_CS3_CTRL 0x00000020 -#endif /* _JAMICA54455_H */ +#endif /* _M54455EVB_H */ -- cgit v1.1 From e5c794e491a57d829b6d8733e2ed8368a2269abf Mon Sep 17 00:00:00 2001 From: Justin Flammia Date: Mon, 29 Oct 2007 17:40:35 -0400 Subject: DHCP Client Fix This is a multi-part message in MIME format. commit e6e505eae94ed721e123e177489291fc4544b7b8 Author: Justin Flammia Date: Mon Oct 29 17:19:03 2007 -0400 Found a bug in the way the DHCP Request packet is built, where the IP address that is offered by the server is bound to prematurely. This patch is a fix of that bug where the IP address offered by the DHCP server is not used until after the DHCP ACK from the server is received. Signed-off-by: Justin Flammia Signed-off-by: Ben Warren --- net/bootp.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/net/bootp.c b/net/bootp.c index 749d3e5..cfe6f8d 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -850,9 +850,9 @@ static void DhcpSendRequestPkt(Bootp_t *bp_offer) bp->bp_hlen = HWL_ETHER; bp->bp_hops = 0; bp->bp_secs = htons(get_timer(0) / CFG_HZ); - NetCopyIP(&bp->bp_ciaddr, &bp_offer->bp_ciaddr); /* both in network byte order */ - NetCopyIP(&bp->bp_yiaddr, &bp_offer->bp_yiaddr); - NetCopyIP(&bp->bp_siaddr, &bp_offer->bp_siaddr); + /* Do not set the client IP, your IP, or server IP yet, since it hasn't been ACK'ed by + * the server yet */ + /* * RFC3046 requires Relay Agents to discard packets with * nonzero and offered giaddr @@ -870,7 +870,9 @@ static void DhcpSendRequestPkt(Bootp_t *bp_offer) /* * Copy options from OFFER packet if present */ - NetCopyIP(&OfferedIP, &bp->bp_yiaddr); + + /* Copy offered IP into the parameters request list */ + NetCopyIP(&OfferedIP, &bp_offer->bp_yiaddr); extlen = DhcpExtended((u8 *)bp->bp_vend, DHCP_REQUEST, NetDHCPServerIP, OfferedIP); pktlen = BOOTP_SIZE - sizeof(bp->bp_vend) + extlen; @@ -980,3 +982,4 @@ void DhcpRequest(void) #endif #endif + -- cgit v1.1 From 8b6684a698500be9c142ec2c9f46cfc348e17f0c Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Wed, 24 Oct 2007 15:48:37 +0200 Subject: ATSTK1002: Remove default ethernet addresses Wolfgang is right: It's not a good idea to set up default initial ethernet addresses for a board, even though they belong to the local range. This will change the failure mode from "IT manager screams at you for using duplicate ethernet addresses" to a nice error message explaining that the ethernet address hasn't been set properly. Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 1809fc5..b33e26f 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -114,15 +114,10 @@ #define CONFIG_AUTOBOOT_STOP_STR " " /* - * These are "locally administered ethernet addresses" generated by - * ./tools/gen_eth_addr - * - * After booting the board for the first time, new addresses should be - * generated and assigned to the environment variables "ethaddr" and - * "eth1addr". + * After booting the board for the first time, new ethernet addresses + * should be generated and assigned to the environment variables + * "ethaddr" and "eth1addr". This is normally done during production. */ -#define CONFIG_ETHADDR 6a:87:71:14:cd:cb -#define CONFIG_ETH1ADDR ca:f8:15:e6:3e:e6 #define CONFIG_OVERWRITE_ETHADDR_ONCE 1 #define CONFIG_NET_MULTI 1 -- cgit v1.1 From 6abd82e19ae93c0b4d104e50165e235915ec0875 Mon Sep 17 00:00:00 2001 From: Sergej Stepanov Date: Wed, 17 Oct 2007 11:18:42 +0200 Subject: changes for IDS8247 board support To get the IDS8247 board working following are done: - FCC2 is deactivated - FCC1 is activated - I2C is activated - CFI driver is activated - Adapted for use with LIBFDT Signed-off-by: Sergej Stepanov -- --- board/ids8247/ids8247.c | 106 +++++++++++++++++++++++++++++++--------------- include/configs/IDS8247.h | 38 ++++++++++++----- 2 files changed, 101 insertions(+), 43 deletions(-) diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c index 19823a4..b05424d 100644 --- a/board/ids8247/ids8247.c +++ b/board/ids8247/ids8247.c @@ -25,6 +25,12 @@ #include #include +#if defined(CONFIG_OF_LIBFDT) +#include +#include +#include +#endif + DECLARE_GLOBAL_DATA_PTR; /* @@ -38,12 +44,12 @@ const iop_conf_t iop_conf_tab[4][32] = { /* Port A configuration */ { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 COL */ - /* PA30 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 CRS */ - /* PA29 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 TXER */ - /* PA28 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 TXEN */ - /* PA27 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */ - /* PA26 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 RXER */ + /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 COL */ + /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 CRS */ + /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXER */ + /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXEN */ + /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */ + /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXER */ /* PA25 */ { 0, 0, 0, 0, 1, 0 }, /* 8247_P0 */ #if defined(CONFIG_SOFT_I2C) /* PA24 */ { 1, 0, 0, 0, 1, 1 }, /* I2C_SDA2 */ @@ -53,14 +59,14 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PA23 */ { 0, 0, 0, 1, 0, 0 }, /* PA23 */ #endif /* PA22 */ { 0, 0, 0, 0, 1, 0 }, /* SMC2_DCD */ - /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD3 */ - /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD2 */ - /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD1 */ - /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD0 */ - /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD0 */ - /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD1 */ - /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD2 */ - /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD3 */ + /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD3 */ + /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD2 */ + /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD1 */ + /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD0 */ + /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD0 */ + /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD1 */ + /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD2 */ + /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD3 */ /* PA13 */ { 0, 0, 0, 1, 1, 0 }, /* SMC2_RTS */ /* PA12 */ { 0, 0, 0, 0, 1, 0 }, /* SMC2_CTS */ /* PA11 */ { 0, 0, 0, 1, 1, 0 }, /* SMC2_DTR */ @@ -79,20 +85,20 @@ const iop_conf_t iop_conf_tab[4][32] = { /* Port B configuration */ { /* conf ppar psor pdir podr pdat */ - /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ - /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ - /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ - /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ - /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ - /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ - /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ - /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ - /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ - /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ - /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ - /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ - /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ - /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ + /* PB31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ + /* PB30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ + /* PB29 */ { 0, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ + /* PB28 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ + /* PB27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ + /* PB26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ + /* PB25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ + /* PB24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ + /* PB23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ + /* PB22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ + /* PB21 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ + /* PB20 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ + /* PB19 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ + /* PB18 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */ /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* PB16 */ /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* PB15 */ @@ -123,8 +129,8 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */ /* PC25 */ { 0, 1, 1, 0, 0, 0 }, /* SYNC_IN */ /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */ - /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */ - /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */ + /* PC23 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII TX_CLK */ + /* PC22 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RX_CLK */ /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */ /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */ /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */ @@ -180,7 +186,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ /* PD9 */ { 0, 0, 0, 0, 0, 0 }, /* PD9 */ /* PD8 */ { 0, 0, 0, 0, 0, 0 }, /* PD8 */ - /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* MII_MDIO */ + /* PD7 */ { 1, 0, 0, 1, 0, 1 }, /* MII_MDIO */ /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */ /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */ /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */ @@ -224,7 +230,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, * mapped by the controller. That means, that the initial mapping has * to be (at least) twice as large as the maximum expected size. */ - maxsize = (1 + (~orx | 0x7fff)) / 2; + maxsize = (1 + (~orx | 0x7fff))/* / 2*/; sdmr_ptr = &memctl->memc_psdmr; orx_ptr = &memctl->memc_or2; @@ -315,4 +321,38 @@ nand_init (void) printf ("%4lu MB\n", totlen >>20); } -#endif +#endif /* CFG_CMD_NAND */ + +#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) +/* + * update "memory" property in the blob + */ +void ft_blob_update(void *blob, bd_t *bd) +{ + int ret, nodeoffset = 0; + ulong memory_data[2] = {0}; + + memory_data[0] = cpu_to_be32(bd->bi_memstart); + memory_data[1] = cpu_to_be32(bd->bi_memsize); + + nodeoffset = fdt_find_node_by_path (blob, "/memory"); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, + sizeof(memory_data)); + if (ret < 0) + printf("ft_blob_update): cannot set /memory/reg " + "property err:%s\n", fdt_strerror(ret)); + } + else { + /* memory node is required in dts */ + printf("ft_blob_update(): cannot find /memory node " + "err:%s\n", fdt_strerror(nodeoffset)); + } +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup( blob, bd); + ft_blob_update(blob, bd); +} +#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index 85d2bb3..bb87fae 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -120,6 +120,17 @@ #define CFG_NS16550_COM1 (CFG_UART_BASE + 0x8000) + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_CPU "PowerPC,8247@0" +#define OF_SOC "soc@f0000000" +#define OF_TBCLK (bd->bi_busfreq / 4) +#define OF_STDOUT_PATH "/soc@f0000000/serial8250@e0008000" + + /* * select ethernet configuration * @@ -133,16 +144,18 @@ #undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */ #define CONFIG_ETHER_ON_FCC /* define if ether on FCC */ #undef CONFIG_ETHER_NONE /* define if ether on something else */ -#define CONFIG_ETHER_INDEX 2 /* which SCC/FCC channel for ethernet */ +#define CONFIG_ETHER_INDEX 1 /* which SCC/FCC channel for ethernet */ +#define CONFIG_ETHER_ON_FCC1 +#define FCC_ENET /* - * - Rx-CLK is CLK13 - * - Tx-CLK is CLK14 + * - Rx-CLK is CLK10 + * - Tx-CLK is CLK9 * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CFG_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CFG_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) +# define CFG_CMXFCR_VALUE (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK9) # define CFG_CPMFCR_RAMTYPE 0 # define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB) @@ -166,6 +179,8 @@ #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_RTC_PCF8563 +#define CFG_I2C_RTC_ADDR 0x51 /* * Command line configuration. @@ -211,7 +226,10 @@ */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CFG_FLASH_BANKS_LIST { 0xFF800000 } +#define CFG_MAX_FLASH_BANKS_DETECT 1 /* What should the base address of the main FLASH be and how big is * it (in MBytes)? This must contain TEXT_BASE from board/ids8247/config.mk * The main FLASH is whichever is connected to *CS0. @@ -227,7 +245,7 @@ * FLASH organization */ #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ -#define CFG_MAX_FLASH_SECT 64 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ #define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ @@ -511,12 +529,12 @@ */ #define CFG_OR2 ((~(CFG_GLOBAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ ORxS_BPD_4 |\ - ORxS_ROWST_PBI0_A10 |\ + ORxS_ROWST_PBI0_A9 |\ ORxS_NUMR_12) -#define CFG_PSDMR (PSDMR_SDAM_A13_IS_A5 |\ +#define CFG_PSDMR (PSDMR_SDAM_A14_IS_A5 |\ PSDMR_BSMA_A15_A17 |\ - PSDMR_SDA10_PBI0_A11 |\ + PSDMR_SDA10_PBI0_A10 |\ PSDMR_RFRC_5_CLK |\ PSDMR_PRETOACT_2W |\ PSDMR_ACTTORW_2W |\ -- cgit v1.1 From c9e7b9b9a1700fe009678d1f9b41e6364ac5df2d Mon Sep 17 00:00:00 2001 From: Sergej Stepanov Date: Wed, 17 Oct 2007 11:13:51 +0200 Subject: add ft_cpu_setup(..) on mpc8260 Add ft_cpu_setup(..)-function to adapt it for use with libfdt based on code from mpc5xxx Sigend-off-by: Sergej Stepanov -- --- cpu/mpc8260/cpu.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c index 94651dc..c2b753d 100644 --- a/cpu/mpc8260/cpu.c +++ b/cpu/mpc8260/cpu.c @@ -47,6 +47,11 @@ #include #include +#if defined(CONFIG_OF_LIBFDT) +#include +#include +#endif + DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_GET_CPU_STR_F) @@ -294,3 +299,36 @@ void watchdog_reset (void) #endif /* CONFIG_WATCHDOG */ /* ------------------------------------------------------------------------- */ +#if defined(CONFIG_OF_LIBFDT) +static void do_fixup(void *fdt, const char *node, const char *prop, + const void *val, int len, int create) +{ +#if defined(DEBUG) + int i; + debug("Updating property '%s/%s' = ", node, prop); + for (i = 0; i < len; i++) + debug(" %.2x", *(u8*)(val+i)); + debug("\n"); +#endif + int rc = fdt_find_and_setprop(fdt, node, prop, val, len, create); + if (rc) + printf("Unable to update property %s:%s, err=%s\n", + node, prop, fdt_strerror(rc)); +} + +static void do_fixup_u32(void *fdt, const char *node, const char *prop, + u32 val, int create) +{ + val = cpu_to_fdt32(val); + do_fixup(fdt, node, prop, &val, sizeof(val), create); +} + +void ft_cpu_setup (void *blob, bd_t *bd) +{ + char * cpu_path = "/cpus/" OF_CPU; + + do_fixup_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1); + do_fixup_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); + do_fixup_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1); +} +#endif /* CONFIG_OF_LIBFDT */ -- cgit v1.1 From 59543fe00a4ce720ef9f5aa7fb387c6daf1c7d78 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Tue, 23 Oct 2007 14:35:05 +0200 Subject: Fix a typo in cpu/mpc824x/interrupts.c Since December 2003 the timer_interrupt_cpu() function in cpu/mpc824x/interrupts.c contains what seems to be a superfluous parameter. Remove it. Signed-off-by: Guennadi Liakhovetski --- cpu/mpc824x/interrupts.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpu/mpc824x/interrupts.c b/cpu/mpc824x/interrupts.c index acb8947..4359ecc 100644 --- a/cpu/mpc824x/interrupts.c +++ b/cpu/mpc824x/interrupts.c @@ -86,7 +86,7 @@ void irq_free_handler (int vec) vga? */ -void timer_interrupt_cpu (struct pt_regs *regs, ulong timestamp) +void timer_interrupt_cpu (struct pt_regs *regs) { /* nothing to do here */ return; -- cgit v1.1 From 29c29c0267fe857e72014ce90c5d35b2ef6302bd Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Tue, 23 Oct 2007 16:25:50 +0200 Subject: Fix typo in nfs.c An obvious typo. Originally fixed in linkstation u-boot port. Signed-off-by: Guennadi Liakhovetski --- net/nfs.c | 1 - 1 file changed, 1 deletion(-) diff --git a/net/nfs.c b/net/nfs.c index df2caac..1b27c97 100644 --- a/net/nfs.c +++ b/net/nfs.c @@ -405,7 +405,6 @@ rpc_lookup_reply (int prog, uchar *pkt, unsigned len) if (rpc_pkt.u.reply.rstatus || rpc_pkt.u.reply.verifier || - rpc_pkt.u.reply.astatus || rpc_pkt.u.reply.astatus) { return -1; } -- cgit v1.1 From 56622f87857439b1c221e9deef11a9d5bb5d4308 Mon Sep 17 00:00:00 2001 From: Marian Balakowicz Date: Wed, 24 Oct 2007 01:37:36 +0200 Subject: TQM5200: Call usb_cpu_init() during board init usb_cpu_init() configures GPS USB pins, clocks, etc. and is required for proper operation of kernel USB subsystem. This setup was previously done in the kernel by the fixup code which is being removed, thus low level init must be done by U-boot now. Signed-off-by: Marian Balakowicz --- board/tqm5200/tqm5200.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c index d10cb59..da4e228 100644 --- a/board/tqm5200/tqm5200.c +++ b/board/tqm5200/tqm5200.c @@ -441,15 +441,21 @@ ulong post_word_load (void) } #endif /* CONFIG_POST || CONFIG_LOGBUFFER*/ -#ifdef CONFIG_PS2MULT #ifdef CONFIG_BOARD_EARLY_INIT_R int board_early_init_r (void) { +#ifdef CONFIG_PS2MULT ps2mult_early_init(); +#endif /* CONFIG_PS2MULT */ + +#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) + /* Low level USB init, required for proper kernel operation */ + usb_cpu_init(); +#endif + return (0); } #endif -#endif /* CONFIG_PS2MULT */ #ifdef CONFIG_FO300 int silent_boot (void) -- cgit v1.1 From 4e62041023dc3de9d98d977bb080235bc6d035e0 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Wed, 24 Oct 2007 18:16:01 +0200 Subject: Use config_cmd_default.h instead of config_cmd_all.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/ADNPESC1.h | 50 ++++++++++++++++++------------------------- include/configs/DK1C20.h | 47 ++++++++++++++++------------------------ include/configs/DK1S10.h | 51 +++++++++++++++++--------------------------- include/configs/LANTEC.h | 48 +++++++++++++++-------------------------- include/configs/MPC8260ADS.h | 48 +++++++++++++++++------------------------ include/configs/RBC823.h | 49 +++++++++++++++++++----------------------- include/configs/ep8260.h | 47 +++++++++++++++++----------------------- include/configs/hymod.h | 49 +++++++++++++++++++++--------------------- 8 files changed, 160 insertions(+), 229 deletions(-) diff --git a/include/configs/ADNPESC1.h b/include/configs/ADNPESC1.h index 77938b1..c45c395 100644 --- a/include/configs/ADNPESC1.h +++ b/include/configs/ADNPESC1.h @@ -574,38 +574,30 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_ASKENV -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_CACHE -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_FAT -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_NAND +#include + +#define CONFIG_CMD_BSP +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DISPLAY +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_REISER +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_NFS -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_VFD -#undef CONFIG_CMD_USB #undef CONFIG_CMD_XIMG -#if (CFG_NIOS_CPU_SPI_NUMS != 1) -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_DATE +#if (CFG_NIOS_CPU_SPI_NUMS == 1) +#define CONFIG_CMD_DATE +#define CONFIG_CMD_SPI #endif /*------------------------------------------------------------------------ diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h index 0ddf0e3..eb78080 100644 --- a/include/configs/DK1C20.h +++ b/include/configs/DK1C20.h @@ -459,38 +459,27 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_ASKENV -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_CACHE -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_NAND +#include + +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DISPLAY +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_IDE +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_NFS -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_VFD -#undef CONFIG_CMD_USB #undef CONFIG_CMD_XIMG - /*------------------------------------------------------------------------ * COMPACT FLASH *----------------------------------------------------------------------*/ diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h index 0032fd3..bd36071 100644 --- a/include/configs/DK1S10.h +++ b/include/configs/DK1S10.h @@ -466,38 +466,25 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_ASKENV -#undef COND_CMD_BEDBUG -#undef COND_CMD_BMP -#undef COND_CMD_BSP -#undef COND_CMD_CACHE -#undef COND_CMD_DATE -#undef COND_CMD_DOC -#undef COND_CMD_DTT -#undef COND_CMD_EEPROM -#undef COND_CMD_ELF -#undef COND_CMD_FAT -#undef COND_CMD_FDC -#undef COND_CMD_FDOS -#undef COND_CMD_HWFLOW -#undef COND_CMD_IDE -#undef COND_CMD_I2C -#undef COND_CMD_JFFS2 -#undef COND_CMD_KGDB -#undef COND_CMD_NAND -#undef COND_CMD_NFS -#undef COND_CMD_MMC -#undef COND_CMD_MII -#undef COND_CMD_PCI -#undef COND_CMD_PCMCIA -#undef COND_CMD_SCSI -#undef COND_CMD_SPI -#undef COND_CMD_VFD -#undef COND_CMD_USB -#undef COND_CMD_XIMG - +#include + +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DISPLAY +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_REISER +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_XIMG /*------------------------------------------------------------------------ * KGDB diff --git a/include/configs/LANTEC.h b/include/configs/LANTEC.h index 46edd08..e92069b 100644 --- a/include/configs/LANTEC.h +++ b/include/configs/LANTEC.h @@ -87,37 +87,23 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_FAT +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_XIMG #if !(CONFIG_LANTEC >= 2) diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h index 713518d..23508f9 100644 --- a/include/configs/MPC8260ADS.h +++ b/include/configs/MPC8260ADS.h @@ -209,35 +209,25 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FAT -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_SNTP -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM + #undef CONFIG_CMD_XIMG #if CONFIG_ADSTYPE == CFG_8272ADS diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 2f6de81..fa32e33 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -105,36 +105,31 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_BEDBUG +#define CONFIG_CMD_BMP +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DOC +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_KGDB +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM + #undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_SNTP -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD #undef CONFIG_CMD_XIMG - /* * Miscellaneous configurable options */ diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index 025c249..490db5f 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -303,38 +303,29 @@ /* * Command line configuration. */ -#include +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_BEDBUG +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP #undef CONFIG_CMD_DCR -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD #undef CONFIG_CMD_XIMG - /* Where do the internal registers live? */ #define CFG_IMMR 0xF0000000 #define CFG_DEFAULT_IMMR 0x00010000 diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 2547afb..01e7970 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -185,33 +185,34 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_BSP +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DTT +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_KGDB +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_VFD #undef CONFIG_CMD_XIMG - #ifdef DEBUG #define CONFIG_BOOTDELAY -1 /* autoboot disabled */ #else -- cgit v1.1 From bbf4796f6498fbade56d56eff3a0a49b299d93e5 Mon Sep 17 00:00:00 2001 From: Zhang Wei Date: Thu, 25 Oct 2007 17:30:04 +0800 Subject: Fix USB support issue for MPC8641HPCN board. The configuration file has already enabled USB, but it missed definition of CFG_OHCI_SWAP_REG_ACCESS, the USB on MPC8641HPCN can not work because of the wrong USB register endian. And add the USB command to U-Boot commands list. Signed-off-by: Zhang Wei --- include/configs/MPC8641HPCN.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 7d8a380..aa6dbc4 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -346,6 +346,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_USB_EVENT_POLL 1 #define CFG_USB_OHCI_SLOT_NAME "ohci_pci" #define CFG_USB_OHCI_MAX_ROOT_PORTS 15 +#define CFG_OHCI_SWAP_REG_ACCESS 1 #if !defined(CONFIG_PCI_PNP) #define PCI_ENET0_IOADDR 0xe0000000 @@ -544,6 +545,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CMD_PCI #define CONFIG_CMD_SCSI #define CONFIG_CMD_EXT2 + #define CONFIG_CMD_USB #endif -- cgit v1.1 From eb6f214d3644b2a77968c176ed36dcf858cfe7e0 Mon Sep 17 00:00:00 2001 From: Zhang Wei Date: Thu, 25 Oct 2007 17:51:27 +0800 Subject: Fix the issue of usb_kbd driver missing the scan code of key 'z'. The scan code of the key 'z' is 0x1d, which should be handled. The change has be tested on NOVATEK USB keyboard and ULI PCI OHCI controller. Signed-off-by: Zhang Wei --- common/usb_kbd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/usb_kbd.c b/common/usb_kbd.c index aec558a..7bdfcc0 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -257,7 +257,7 @@ static int usb_kbd_translate(unsigned char scancode,unsigned char modifier,int p repeat_delay=REPEAT_DELAY; } keycode=0; - if((scancode>3) && (scancode<0x1d)) { /* alpha numeric values */ + if((scancode>3) && (scancode<=0x1d)) { /* alpha numeric values */ keycode=scancode-4 + 0x61; if(caps_lock) keycode&=~CAPITAL_MASK; /* switch to capital Letters */ -- cgit v1.1 From ec22755799466c8a103664bb3a5e647bf9c238f4 Mon Sep 17 00:00:00 2001 From: Vlad Lungu Date: Thu, 25 Oct 2007 16:08:14 +0300 Subject: Trimmed some variables in ne2000.c Signed-off-by: Vlad Lungu --- drivers/ne2000.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/ne2000.c b/drivers/ne2000.c index 695a1dc..c978d62 100644 --- a/drivers/ne2000.c +++ b/drivers/ne2000.c @@ -723,7 +723,8 @@ static hw_info_t hw_info[] = { { /* SuperSocket RE450T */ 0x0110, 0x00, 0xe0, 0x98, 0 }, { /* Volktek NPL-402CT */ 0x0060, 0x00, 0x40, 0x05, 0 }, { /* NEC PC-9801N-J12 */ 0x0ff0, 0x00, 0x00, 0x4c, 0 }, - { /* PCMCIA Technology OEM */ 0x01c8, 0x00, 0xa0, 0x0c, 0 } + { /* PCMCIA Technology OEM */ 0x01c8, 0x00, 0xa0, 0x0c, 0 }, + { /* Qemu */ 0x0, 0x52, 0x54, 0x00, 0 } }; #define NR_INFO (sizeof(hw_info)/sizeof(hw_info_t)) @@ -824,30 +825,22 @@ static hw_info_t * get_prom(void ) { /* U-boot specific routines */ -#define NB 5 static unsigned char *pbuf = NULL; -static int plen[NB]; -static int nrx = 0; static int pkey = -1; static int initialized=0; void uboot_push_packet_len(int len) { - PRINTK("pushed len = %d, nrx = %d\n", len, nrx); + PRINTK("pushed len = %d\n", len); if (len>=2000) { printf("NE2000: packet too big\n"); return; } - if (nrx >= NB) { - printf("losing packets in rx\n"); - return; - } - plen[nrx] = len; - dp83902a_recv(&pbuf[nrx*2000], len); + dp83902a_recv(&pbuf[0], len); /*Just pass it to the upper layer*/ - NetReceive(&pbuf[nrx*2000], plen[nrx]); + NetReceive(&pbuf[0], len); } void uboot_push_tx_done(int key, int val) { @@ -862,9 +855,9 @@ int eth_init(bd_t *bd) { PRINTK("### eth_init\n"); if (!pbuf) { - pbuf = malloc(NB*2000); + pbuf = malloc(2000); if (!pbuf) { - printf("Cannot allocate rx buffers\n"); + printf("Cannot allocate rx buffer\n"); return -1; } } -- cgit v1.1 From ad845beef06245426c57b53dcdc01b7dc70e0d45 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Wed, 31 Oct 2007 02:18:15 +0900 Subject: blackfin: Move `-D__BLACKFIN__' to $(ARCH)_config.mk Signed-off-by: Shinya Kuribayashi --- blackfin_config.mk | 2 +- config.mk | 4 ---- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/blackfin_config.mk b/blackfin_config.mk index df324b7..f71a313 100644 --- a/blackfin_config.mk +++ b/blackfin_config.mk @@ -21,4 +21,4 @@ # MA 02111-1307 USA # -PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN +PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN -D__BLACKFIN__ diff --git a/config.mk b/config.mk index 582df32..37d61a0 100644 --- a/config.mk +++ b/config.mk @@ -69,10 +69,6 @@ PLATFORM_CPPFLAGS+= -D__ARM__ endif endif -ifeq ($(ARCH),blackfin) -PLATFORM_CPPFLAGS+= -D__BLACKFIN__ -endif - ifdef ARCH sinclude $(TOPDIR)/$(ARCH)_config.mk # include architecture dependend rules endif -- cgit v1.1 From e881cb563e32f45832b7b6db77bdcd017adcbb41 Mon Sep 17 00:00:00 2001 From: Bruce Adler Date: Fri, 2 Nov 2007 13:15:42 -0700 Subject: fix wording in README Changed the wording to properly describe the shadowing of the environment from ROM to RAM Signed-off-by: Bruce Adler --- README | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README b/README index 09eb76f..3dad5fc 100644 --- a/README +++ b/README @@ -2123,7 +2123,7 @@ to save the current settings. to be a good choice since it makes it far enough from the start of the data area as well as from the stack pointer. -Please note that the environment is read-only as long as the monitor +Please note that the environment is read-only until the monitor has been relocated to RAM and a RAM copy of the environment has been created; also, when using EEPROM you will have to use getenv_r() until then to read environment variables. -- cgit v1.1 From 992742a5b09d9040adbd156fb90756af66ade310 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sat, 3 Nov 2007 23:09:27 +0100 Subject: Cleanup coding style; update CHANGELOG Signed-off-by: Wolfgang Denk --- CHANGELOG | 519 ++++++++++++++++++++++++++++++++++++++++++++ cpu/mpc85xx/start.S | 4 +- include/configs/M54455EVB.h | 2 +- net/bootp.c | 5 +- 4 files changed, 524 insertions(+), 6 deletions(-) diff --git a/CHANGELOG b/CHANGELOG index 549c4f9..0068947 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,328 @@ +commit e881cb563e32f45832b7b6db77bdcd017adcbb41 +Author: Bruce Adler +Date: Fri Nov 2 13:15:42 2007 -0700 + + fix wording in README + + Changed the wording to properly describe the shadowing + of the environment from ROM to RAM + + Signed-off-by: Bruce Adler + +commit ad845beef06245426c57b53dcdc01b7dc70e0d45 +Author: Shinya Kuribayashi +Date: Wed Oct 31 02:18:15 2007 +0900 + + blackfin: Move `-D__BLACKFIN__' to $(ARCH)_config.mk + + Signed-off-by: Shinya Kuribayashi + +commit ec22755799466c8a103664bb3a5e647bf9c238f4 +Author: Vlad Lungu +Date: Thu Oct 25 16:08:14 2007 +0300 + + Trimmed some variables in ne2000.c + + Signed-off-by: Vlad Lungu + +commit eb6f214d3644b2a77968c176ed36dcf858cfe7e0 +Author: Zhang Wei +Date: Thu Oct 25 17:51:27 2007 +0800 + + Fix the issue of usb_kbd driver missing the scan code of key 'z'. + + The scan code of the key 'z' is 0x1d, which should be handled. + + The change has be tested on NOVATEK USB keyboard and ULI PCI OHCI + controller. + + Signed-off-by: Zhang Wei + +commit bbf4796f6498fbade56d56eff3a0a49b299d93e5 +Author: Zhang Wei +Date: Thu Oct 25 17:30:04 2007 +0800 + + Fix USB support issue for MPC8641HPCN board. + + The configuration file has already enabled USB, but it + missed definition of CFG_OHCI_SWAP_REG_ACCESS, the USB + on MPC8641HPCN can not work because of the wrong USB + register endian. + + And add the USB command to U-Boot commands list. + + Signed-off-by: Zhang Wei + +commit 4e62041023dc3de9d98d977bb080235bc6d035e0 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Wed Oct 24 18:16:01 2007 +0200 + + Use config_cmd_default.h instead of config_cmd_all.h + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 56622f87857439b1c221e9deef11a9d5bb5d4308 +Author: Marian Balakowicz +Date: Wed Oct 24 01:37:36 2007 +0200 + + TQM5200: Call usb_cpu_init() during board init + + usb_cpu_init() configures GPS USB pins, clocks, etc. and + is required for proper operation of kernel USB subsystem. + This setup was previously done in the kernel by the fixup + code which is being removed, thus low level init must be + done by U-boot now. + + Signed-off-by: Marian Balakowicz + +commit 29c29c0267fe857e72014ce90c5d35b2ef6302bd +Author: Guennadi Liakhovetski +Date: Tue Oct 23 16:25:50 2007 +0200 + + Fix typo in nfs.c + + An obvious typo. Originally fixed in linkstation u-boot port. + + Signed-off-by: Guennadi Liakhovetski + +commit 59543fe00a4ce720ef9f5aa7fb387c6daf1c7d78 +Author: Guennadi Liakhovetski +Date: Tue Oct 23 14:35:05 2007 +0200 + + Fix a typo in cpu/mpc824x/interrupts.c + + Since December 2003 the timer_interrupt_cpu() function in + cpu/mpc824x/interrupts.c contains what seems to be a superfluous + parameter. Remove it. + + Signed-off-by: Guennadi Liakhovetski + +commit c9e7b9b9a1700fe009678d1f9b41e6364ac5df2d +Author: Sergej Stepanov +Date: Wed Oct 17 11:13:51 2007 +0200 + + add ft_cpu_setup(..) on mpc8260 + + Add ft_cpu_setup(..)-function to adapt it for use with libfdt + based on code from mpc5xxx + + Sigend-off-by: Sergej Stepanov + -- + +commit 6abd82e19ae93c0b4d104e50165e235915ec0875 +Author: Sergej Stepanov +Date: Wed Oct 17 11:18:42 2007 +0200 + + changes for IDS8247 board support + + To get the IDS8247 board working following are done: + - FCC2 is deactivated + - FCC1 is activated + - I2C is activated + - CFI driver is activated + - Adapted for use with LIBFDT + + Signed-off-by: Sergej Stepanov + -- + +commit 8b6684a698500be9c142ec2c9f46cfc348e17f0c +Author: Haavard Skinnemoen +Date: Wed Oct 24 15:48:37 2007 +0200 + + ATSTK1002: Remove default ethernet addresses + + Wolfgang is right: It's not a good idea to set up default initial + ethernet addresses for a board, even though they belong to the local + range. + + This will change the failure mode from "IT manager screams at you for + using duplicate ethernet addresses" to a nice error message explaining + that the ethernet address hasn't been set properly. + + Signed-off-by: Haavard Skinnemoen + +commit e5c794e491a57d829b6d8733e2ed8368a2269abf +Author: Justin Flammia +Date: Mon Oct 29 17:40:35 2007 -0400 + + DHCP Client Fix + + This is a multi-part message in MIME format. + + commit e6e505eae94ed721e123e177489291fc4544b7b8 + Author: Justin Flammia + Date: Mon Oct 29 17:19:03 2007 -0400 + + Found a bug in the way the DHCP Request packet is built, where the IP address + that is offered by the server is bound to prematurely. This patch is a fix of + that bug where the IP address offered by the DHCP server is not used until + after the DHCP ACK from the server is received. + + Signed-off-by: Justin Flammia + Signed-off-by: Ben Warren + +commit e8ee8f3ade2a06c1893dd5e68f223070d650c7ed +Author: TsiChungLiew +Date: Thu Oct 25 17:16:22 2007 -0500 + + ColdFire 54455: Fix correct boot location for atmel and intel + + Signed-off-by: TsiChungLiew + +commit 688e8eb414ac111cca7ce60bdf30e805ab9a7bcb +Author: TsiChungLiew +Date: Thu Oct 25 17:14:00 2007 -0500 + + ColdFire: Fix build error when CONFIG_WATCHDOG is defined + + Signed-off-by: TsiChungLiew + +commit c67e12e705b204cfe914e3e3e693d69a445dcabf +Author: TsiChungLiew +Date: Thu Oct 25 17:12:36 2007 -0500 + + ColdFire 5329: Assign correct SDRAM size and fix cache + + Signed-off-by: TsiChungLiew + +commit 95e9f2c212a65610b2e59a5c00d0113383a4da0b +Author: TsiChungLiew +Date: Thu Oct 25 17:10:23 2007 -0500 + + ColdFire 5253: Assign correct SDRAM size + + Signed-off-by: TsiChungLiew + +commit 2acefa72ee0026f862ab65597ca687428f63a973 +Author: TsiChungLiew +Date: Thu Oct 25 17:09:17 2007 -0500 + + ColdFire 5282: Fix external flash boot and return dramsize + + Signed-off-by: TsiChungLiew + +commit d78791ae914d4e7c5edca1cdad73b3dc81a4eb82 +Author: Bartlomiej Sieka +Date: Thu Oct 25 17:20:01 2007 +0200 + + TQM5200: increase kernel_addr_r and fdt_addr_r (hinted by Wolfgang Denk). + + Signed-off-by: Bartlomiej Sieka + +commit 1a0ce20aa4cb4e3068da04e7290ee9986fd0b834 +Author: Martin Krause +Date: Wed Oct 24 08:42:25 2007 +0200 + + TQM5200: fix spurious characters on second serial interface + + With this patch PSC3 is configured as UART. This is done, because if + the pins of PSC3 are not configured at all (-> all pins are GPI), + due to crosstalk, spurious characters may be send over the RX232_2_TXD + signal line. + + Signed-off-by: Martin Krause + Signed-off-by: Grant Likely + +commit be4a87f11e297a5cededbf7dd71c0248f3874acd +Author: Martin Krause +Date: Wed Oct 24 08:41:27 2007 +0200 + + TQM5200S: fix commands for STK52xx base board because of missing SM501 grafic controller + + Some commands for the STK52xx base board try to access the SM501 grafic + controller. But the TQM5200S has no grafic controller (only the TQM5200 + and the TQM5200B have). This patch deactivates the commands accessing + the SM501 for the TQM5200S. + + Signed-off-by: Martin Krause + Signed-off-by: Grant Likely + +commit b31f64343ead9482cd439b1adbe4c34026a641b1 +Author: Martin Krause +Date: Mon Oct 22 16:45:53 2007 +0200 + + TQM5200: fix spurious characters on second serial interface + + With this patch PSC3 is configured as UART. This is done, because if + the pins of PSC3 are not configured at all (-> all pins are GPI), + due to crosstalk, spurious characters may be send over the RX232_2_TXD + signal line. + + Signed-off-by: Martin Krause + +commit 0fc0f91b20ffa802f5a66534ca5c2844910583f6 +Author: Martin Krause +Date: Mon Oct 22 16:40:06 2007 +0200 + + TQM5200S: fix commands for STK52xx base board because of missing SM501 grafic controller + + Some commands for the STK52xx base board try to access the SM501 grafic + controller. But the TQM5200S has no grafic controller (only the TQM5200 + and the TQM5200B have). This patch deactivates the commands accessing + the SM501 for the TQM5200S. + + Signed-off-by: Martin Krause + +commit 7b0a42219f30277f71f4405cbaf8a269f6d2d227 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Oct 21 09:14:28 2007 +0200 + + Mips: Fix string functions differ prototype declaration + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit cb8250fe4b3c4ed549b270e8a20bc22060e7e1d2 +Author: Ed Swarthout +Date: Fri Oct 19 17:51:40 2007 -0500 + + fsl_pci_init enable COMMAND_MEMORY if inbound window + + Patch 16e23c3f removed PCSRBAR allocation. But passing zero windows + to pciauto_setup_device has the side effect of not getting + COMMAND_MEMORY set. + + Signed-off-by: Ed Swarthout + +commit e9d0d527992566ebef9826962ff1745b2f082b92 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 19 10:55:24 2007 +0200 + + delta: Fix OHCI_REGS_BASE undeclared and wait_ms implicit declaration + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 9c4884f54da982ce990c7d1760ac81b0704d3c64 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 19 08:10:15 2007 +0200 + + fix warning: no return statement in function returning non-void + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit e78220f6e514206757acfe247297fc9a328a881f +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 19 06:33:45 2007 +0200 + + xsengine: Fix no partition type specified, use DOS as default + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 10cdb8dbd67a818823ab9ec88b68fc348903db59 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 19 00:24:59 2007 +0200 + + lubbock: Fix no partition type specified, use DOS as default + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 41b4d282d38fa7231c315c5f6cfff5bdd24e0191 +Author: Wolfgang Denk +Date: Tue Oct 23 16:50:03 2007 +0200 + + Coding style: keep lists sorted; update CHANGELOG + + Signed-off-by: Wolfgang Denk + commit 58b74b05c621e2835ecf4e2d3243042cf4186777 Author: Jean-Christophe PLAGNIOL-VILLARD Date: Fri Oct 19 00:09:05 2007 +0200 @@ -51,6 +376,112 @@ Date: Wed Oct 17 11:56:31 2007 -0500 are added to u-boot. Signed-off-by Rune Torgersen +commit d3afa1ee19345a31fd1eaad3e98b97d13ca47315 +Author: Bartlomiej Sieka +Date: Tue Oct 23 13:14:10 2007 +0200 + + Motion-PRO: Update configuration to accomodate next generation board. + + New board has faster oscillator and a different Flash chip. This affects: + - CFG_MPC5XXX_CLKIN + - SDRAM timings + - Flash CS configuration (timings) + - Flash sector size, and thus MTD partition layout + - malloc() arena size (due to bigger Flash sectors) + - smaller memory test range (due to bigger malloc() arena) + + This patch also enables more extensive memory testing via "mtest". + + Signed-off-by: Bartlomiej Sieka + +commit eff501904df2bf1724a750062628ba2c51dbb1f8 +Author: Bartlomiej Sieka +Date: Tue Oct 23 11:36:07 2007 +0200 + + Motion-PRO: Add setting of SDelay reg. to SDRAM controller configuration. + + Per AN3221 (MPC5200B SDRAM Initialization and Configuration), the SDelay + register must be written a value of 0x00000004 as the first step of the + SDRAM contorller configuration. + + Signed-off-by: Bartlomiej Sieka + +commit 7a9348728ebda63cdbaacffd83099aa71d9d4c54 +Author: Peter Pearse +Date: Tue Oct 23 10:22:16 2007 +0100 + + Move PL01* serial drivers to drivers/serial and adjust Makefiles. + +commit de9a738faa7c2f47286119c3bfebc3dfbfe7d86d +Author: Vlad Lungu +Date: Sun Oct 21 22:10:10 2007 +0900 + + [MIPS] Fix UNCACHED_SDRAM + + PHYSADDR is for physical address, KSEG1ADDR is for uncached. + + Signed-off-by: Vlad Lungu + Signed-off-by: Shinya Kuribayashi + +commit 00101dd7a32d12f698150123e47e4b3420279f86 +Author: Shinya Kuribayashi +Date: Sun Oct 21 21:30:42 2007 +0900 + + [MIPS] Add PIC-related switches to PLATFORM_{CPP,LD}FLAGS and cleanup + + Signed-off-by: Shinya Kuribayashi + +commit eb700636db017d310edaeb559b13d82588560674 +Author: Shinya Kuribayashi +Date: Sun Oct 21 10:55:37 2007 +0900 + + [MIPS] u-boot.lds: Define _gp in a standard manner + + Signed-off-by: Shinya Kuribayashi + +commit 22069215eb7adf5a3888bf7c7784ea9d70a72cd0 +Author: Shinya Kuribayashi +Date: Sun Oct 21 10:55:36 2007 +0900 + + [MIPS] Fix $gp usage + + Now we load $gp with _GLOBAL_OFFSET_TABLE_, but this is incorrect use. + As a general principle, we should use _gp for $gp. + + Thanks to linker script's help we fortunately have _gp which equals to + _GLOBAL_OFFSET_TABLE_. But once _gp gets out of alignment, we will not + be able to access to GOT entires, global variables and procedure entry + points. The right thing to do is to use _gp. + + This patch also introduce a new symbol `.gpword _GLOBAL_OFFSET_TABLE_' + which holds the offset from _gp. When updating GOT entries, we use this + offset and _gp to calculate the final _GLOBAL_OFFSET_TABLE_. + + This patch is originally submitted by Vlad Lungu , then + I made some change to leave over num_got_entries. + + Signed-off-by: Shinya Kuribayashi + Cc: Vlad Lungu + +commit cbf2323b5b8285ea01acba7bbb905a3162d9b021 +Author: Shinya Kuribayashi +Date: Sun Oct 21 10:55:36 2007 +0900 + + [MIPS] u-boot.lds: Fix __got_start and __got_end + + Ensure that __got_start points to top of the `.got', and __got_end points + to bottom as well, so that we never fail to count num_got_entries. + + Signed-off-by: Shinya Kuribayashi + +commit e5f325fec5b48ae705c89522923ba5a2e37cd5c7 +Author: Shinya Kuribayashi +Date: Sun Oct 21 10:55:36 2007 +0900 + + [MIPS] u-boot.lds: Remove duplicated .sdata section + + Signed-off-by: Shinya Kuribayashi + commit 05bf4919c1ce49cdedadacd564d0786a8ed796a1 Author: Wolfgang Denk Date: Sun Oct 21 01:01:17 2007 +0200 @@ -73,6 +504,84 @@ Date: Thu Oct 4 20:47:10 2007 +0300 Signed-off-by: Vlad Lungu +commit df90968b48fb34fa9072fab150db2ac89678f537 +Author: urwithsughosh@gmail.com +Date: Mon Sep 24 13:32:13 2007 -0400 + + Setting MSR[DE] in do_reset + + Hello, + This patch ensures the soft reset of the board for the 85xx boards + by setting the MSR[DE] in the do_reset function. + + Signed-off-by: Sughosh Ganu + +commit 1e701e701304b3c3a3768ca83dd2ab7b9e88c77d +Author: urwithsughosh@gmail.com +Date: Mon Sep 24 13:36:01 2007 -0400 + + MSR overwrite fix + + Hello, + This patch fixes the MSR overwrite in the start.S when moving out of + the last 4K page. + + Signed-off-by: Sughosh Ganu + +commit 5c7ea64bb74a850a2b2303f853a8270695ad8602 +Author: Dan Wilson +Date: Fri Oct 19 11:33:48 2007 -0500 + + tsec driver should clear RHALT on startup + + This was causing problems for some people. + + Signed-off-by: Alain Gravel + Signed-off-by: Dan Wilson + Signed-off-by: Andy Fleming + +commit 7600d47b8f6a10019e537dc9a62aa1498df58d25 +Author: Kumar Gala +Date: Thu Oct 11 00:29:18 2007 -0500 + + Improve handling of PCI interrupt device tree fixup on MPC85xx CDS + + On the MPC85xx CDS we have two issues: + + 1. The device tree fixup code did not check to see if the property we are + trying to update is actually found. Its possible that it would update + random memory starting at 0. + + 2. Newer Linux kernel's have moved the location of the PCI nodes to be + sibilings of the soc node and not children. The explicit PATH to the PCI + node would not be found for these device trees. Add the ability to handle + both paths. In the future we shouldn't handle such fixups by explicit path. + + Signed-off-by: Kumar Gala + +commit a3063eec775719b7e91023bbec3f64b3118791df +Author: Kumar Gala +Date: Thu Oct 11 00:18:48 2007 -0500 + + Set OF_STDOUT_PATH to match the default console on MPC8568 MDS + + On the MPC8568 MDS we use ttyS0, UART0, etc. as the standard configured + console. Make it so we match that config what we tell Linux as the early + STDOUT console. + + Signed-off-by: Kumar Gala + +commit e1ce3cb617bb06f91f82f98915391175addf3e82 +Author: Kumar Gala +Date: Tue Oct 2 11:12:27 2007 -0500 + + Remove magic numbers from cache related operations for mpc85xx + + The mpc85xx start code uses some magic numbers that we actually + have #defines for in so use those instead. + + Signed-off-by: Kumar Gala + commit 5441f61a3d8b7034f19fc1361183e936198e6dbb Author: Detlev Zundel Date: Fri Oct 19 16:47:26 2007 +0200 @@ -409,6 +918,16 @@ Date: Tue Sep 11 14:12:55 2007 +0200 Signed-off-by: Stefan Roese +commit 1487adbdcf9594bb2eb686325a6f9540dad1b70a +Author: Ed Swarthout +Date: Wed Sep 26 16:35:54 2007 -0500 + + 85xx io out functions need sync after write. + + This fixes the mc146818 rtc_read/write functions for 85xx. + + Signed-off-by: Ed Swarthout + commit 0d38effc6e359e6b1b0c78d66e8bc1a4dc15a2ae Author: Grant Likely Date: Tue Sep 25 15:48:05 2007 -0600 diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index ada6ea5..b769ef8 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -268,7 +268,7 @@ _start_e500: */ lis r3,CFG_INIT_RAM_ADDR@h ori r3,r3,CFG_INIT_RAM_ADDR@l - li r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) + li r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) mtctr r2 li r0,0 1: @@ -1061,7 +1061,7 @@ unlock_ram_in_cache: /* invalidate the INIT_RAM section */ lis r3,(CFG_INIT_RAM_ADDR & ~31)@h ori r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l - li r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) + li r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) mtctr r4 1: icbi r0,r3 dcbi r0,r3 diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index ba050cb..db30958 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -278,7 +278,7 @@ * FLASH organization */ #ifdef CFG_ATMEL_BOOT -# define CFG_FLASH_BASE CFG_CS0_BASE +# define CFG_FLASH_BASE CFG_CS0_BASE # define CFG_FLASH0_BASE CFG_CS0_BASE # define CFG_FLASH1_BASE CFG_CS1_BASE # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000) diff --git a/net/bootp.c b/net/bootp.c index cfe6f8d..55dcc81 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -979,7 +979,6 @@ void DhcpRequest(void) { BootpRequest(); } -#endif - -#endif +#endif /* CONFIG_CMD_DHCP */ +#endif /* CONFIG_CMD_NET */ -- cgit v1.1