From 59dfb4293bab3dd75923ab06e68043603e3dcf4f Mon Sep 17 00:00:00 2001 From: Utkarsh Gupta Date: Wed, 31 Aug 2016 18:41:17 -0500 Subject: Disable MMU and Cache when using plugin Signed-off-by: Utkarsh Gupta --- arch/arm/include/asm/arch-mx6/mx6_plugin.S | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/include/asm/arch-mx6/mx6_plugin.S b/arch/arm/include/asm/arch-mx6/mx6_plugin.S index 1560a65..ed0fb58 100644 --- a/arch/arm/include/asm/arch-mx6/mx6_plugin.S +++ b/arch/arm/include/asm/arch-mx6/mx6_plugin.S @@ -92,6 +92,34 @@ before_calling_rom___pu_irom_hwcnfg_setup: blx r4 after_calling_rom___pu_irom_hwcnfg_setup: +/* + * ROM_API_HWCNFG_SETUP function enables MMU & Caches. + * Thus disable MMU & Caches. + */ + +#define ENABLE_CACHE 0x01 + + MRC p15, 0, r0, c1, c0, 0 /* read CP15 register 1 into r0 */ + ANDS r0, r0, #0x1 /* check if MMU is enabled */ + BEQ mmu_disable_notreq /* exit if MMU is already disabled */ + +/* Disable caches, MMU */ + MRC p15, 0, r0, c1, c0, 0 /* read CP15 register 1 into r0 */ + BIC r0, r0, #(ENABLE_CACHE << 2) /* disable D Cache */ + BIC r0, r0, #0x1 /* clear bit 0 ; MMU off */ + + BIC r0, r0, #(0x1 << 11) /* disable Z, branch prediction */ + BIC r0, r0, #(0x1 << 1) /* disable A, Strict alignment */ + /* check enabled. */ + + MCR p15, 0, r0, c1, c0, 0 /* write CP15 register 1 */ + MOV r0, r0 + MOV r0, r0 + MOV r0, r0 + MOV r0, r0 + +mmu_disable_notreq: + NOP /* To return to ROM from plugin, we need to fill in these argument. * Here is what need to do: -- cgit v1.1